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authorBlue Swirl <blauwirbel@gmail.com>2010-03-29 19:23:55 +0000
committerBlue Swirl <blauwirbel@gmail.com>2010-03-29 19:23:55 +0000
commit5f9fc5ad7efe2840d3170775768fb85686d94869 (patch)
tree894d04b33056b936c6f0e09c6387c7e58bc7825c /hw/ppc405_boards.c
parent53b67b3052f39b049bc7c79ae1ce132c90098c6c (diff)
downloadqemu-5f9fc5ad7efe2840d3170775768fb85686d94869.tar.gz
Compile pflash_cfi02 only once
Push TARGET_WORDS_BIGENDIAN dependency to board level. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/ppc405_boards.c')
-rw-r--r--hw/ppc405_boards.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c
index 735adc95e3..f40d618963 100644
--- a/hw/ppc405_boards.c
+++ b/hw/ppc405_boards.c
@@ -228,7 +228,8 @@ static void ref405ep_init (ram_addr_t ram_size,
#endif
pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
dinfo->bdrv, 65536, fl_sectors, 1,
- 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+ 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
+ 1);
fl_idx++;
} else
#endif
@@ -542,7 +543,8 @@ static void taihu_405ep_init(ram_addr_t ram_size,
#endif
pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
dinfo->bdrv, 65536, fl_sectors, 1,
- 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+ 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
+ 1);
fl_idx++;
} else
#endif
@@ -584,7 +586,8 @@ static void taihu_405ep_init(ram_addr_t ram_size,
bios_offset = qemu_ram_alloc(bios_size);
pflash_cfi02_register(0xfc000000, bios_offset,
dinfo->bdrv, 65536, fl_sectors, 1,
- 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+ 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
+ 1);
fl_idx++;
}
/* Register CLPD & LCD display */