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author | Peter Maydell <peter.maydell@linaro.org> | 2014-03-13 19:13:33 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-03-13 19:13:33 +0000 |
commit | bbbd67f0ccdba93702e58879997c1d2ca67311b1 (patch) | |
tree | d02c18e59ace36d7f8dcf01040b8f1218ad021b1 /hw/ppc | |
parent | d7f0a59ff02affb8270ad9b6ee7e60974ac92df0 (diff) | |
parent | 2ef1f68d4f6630e6c77071d2dd979123d1b4d0ed (diff) | |
download | qemu-bbbd67f0ccdba93702e58879997c1d2ca67311b1.tar.gz |
Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-2.0' into staging
QOM CPUState refactorings / X86CPU
* Deadlock fix for exit requests around CPU reset
* X86CPU x2apic for KVM
* X86CPU model subclasses
* SPARCCPU preparations for model subclasses
* -cpu arguments for arm, cris, lm32, moxie, openrisc, ppc, sh4, uc32
* m68k assertion cleanups
* CPUClass hooks for cpu.h inline functions
* Field movements from CPU_COMMON to CPUState and follow-up cleanups
# gpg: Signature made Thu 13 Mar 2014 19:06:56 GMT using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg: aka "Andreas Färber <afaerber@suse.com>"
* remotes/afaerber/tags/qom-cpu-for-2.0: (58 commits)
user-exec: Change exception_action() argument to CPUState
cputlb: Change tlb_set_page() argument to CPUState
cputlb: Change tlb_flush() argument to CPUState
cputlb: Change tlb_flush_page() argument to CPUState
target-microblaze: Replace DisasContext::env field with MicroBlazeCPU
target-cris: Replace DisasContext::env field with CRISCPU
exec: Change cpu_abort() argument to CPUState
exec: Change memory_region_section_get_iotlb() argument to CPUState
cputlb: Change tlb_unprotect_code_phys() argument to CPUState
cpu-exec: Change cpu_resume_from_signal() argument to CPUState
exec: Change cpu_breakpoint_{insert,remove{,_by_ref,_all}} argument
exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argument
target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook
translate-all: Change tb_flush_jmp_cache() argument to CPUState
translate-all: Change tb_gen_code() argument to CPUState
translate-all: Change cpu_io_recompile() argument to CPUState
translate-all: Change tb_check_watchpoint() argument to CPUState
translate-all: Change cpu_restore_state_from_tb() argument to CPUState
translate-all: Change cpu_restore_state() argument to CPUState
cpu-exec: Change cpu_loop_exit() argument to CPUState
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ppc')
-rw-r--r-- | hw/ppc/e500.c | 3 | ||||
-rw-r--r-- | hw/ppc/ppc405_uc.c | 2 | ||||
-rw-r--r-- | hw/ppc/ppce500_spin.c | 2 | ||||
-rw-r--r-- | hw/ppc/spapr_hcall.c | 8 |
4 files changed, 7 insertions, 8 deletions
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 8a08752613..d7ba25f379 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -472,14 +472,13 @@ static void ppce500_cpu_reset_sec(void *opaque) { PowerPCCPU *cpu = opaque; CPUState *cs = CPU(cpu); - CPUPPCState *env = &cpu->env; cpu_reset(cs); /* Secondary CPU starts in halted state for now. Needs to change when implementing non-kernel boot. */ cs->halted = 1; - env->exception_index = EXCP_HLT; + cs->exception_index = EXCP_HLT; } static void ppce500_cpu_reset(void *opaque) diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index ca520e8859..54ba59e73a 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -44,7 +44,7 @@ ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd, uint32_t flags) { - CPUState *cs = ENV_GET_CPU(env); + CPUState *cs = CPU(ppc_env_get_cpu(env)); ram_addr_t bdloc; int i, n; diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index 78b23fa597..f9fdc8c548 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -117,7 +117,7 @@ static void spin_kick(void *data) mmubooke_create_initial_mapping(env, 0, map_start, map_size); cpu->halted = 0; - env->exception_index = -1; + cpu->exception_index = -1; cpu->stopped = false; qemu_cpu_kick(cpu); } diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index d918780746..e999bbaea0 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -356,7 +356,7 @@ static target_ulong h_set_dabr(PowerPCCPU *cpu, sPAPREnvironment *spapr, static target_ulong register_vpa(CPUPPCState *env, target_ulong vpa) { - CPUState *cs = ENV_GET_CPU(env); + CPUState *cs = CPU(ppc_env_get_cpu(env)); uint16_t size; uint8_t tmp; @@ -406,7 +406,7 @@ static target_ulong deregister_vpa(CPUPPCState *env, target_ulong vpa) static target_ulong register_slb_shadow(CPUPPCState *env, target_ulong addr) { - CPUState *cs = ENV_GET_CPU(env); + CPUState *cs = CPU(ppc_env_get_cpu(env)); uint32_t size; if (addr == 0) { @@ -442,7 +442,7 @@ static target_ulong deregister_slb_shadow(CPUPPCState *env, target_ulong addr) static target_ulong register_dtl(CPUPPCState *env, target_ulong addr) { - CPUState *cs = ENV_GET_CPU(env); + CPUState *cs = CPU(ppc_env_get_cpu(env)); uint32_t size; if (addr == 0) { @@ -529,7 +529,7 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr, hreg_compute_hflags(env); if (!cpu_has_work(cs)) { cs->halted = 1; - env->exception_index = EXCP_HLT; + cs->exception_index = EXCP_HLT; cs->exit_request = 1; } return H_SUCCESS; |