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authorAndreas Färber <afaerber@suse.de>2013-07-27 13:20:09 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-29 21:07:00 +0200
commit1d998d93acbbefc3804200ab4387cb0286b07d7b (patch)
treee60709599a21e4fac996532d4c50113989deabe3 /hw/sd
parent7a239e46f792b234d77425653a8259152df5d5de (diff)
downloadqemu-1d998d93acbbefc3804200ab4387cb0286b07d7b.tar.gz
pl181: Rename pl181_state to PL181State
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/sd')
-rw-r--r--hw/sd/pl181.c56
1 files changed, 28 insertions, 28 deletions
diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c
index f5eb1e4012..dc085953e0 100644
--- a/hw/sd/pl181.c
+++ b/hw/sd/pl181.c
@@ -22,7 +22,7 @@ do { printf("pl181: " fmt , ## __VA_ARGS__); } while (0)
#define PL181_FIFO_LEN 16
-typedef struct {
+typedef struct PL181State {
SysBusDevice busdev;
MemoryRegion iomem;
SDState *card;
@@ -50,29 +50,29 @@ typedef struct {
qemu_irq irq[2];
/* GPIO outputs for 'card is readonly' and 'card inserted' */
qemu_irq cardstatus[2];
-} pl181_state;
+} PL181State;
static const VMStateDescription vmstate_pl181 = {
.name = "pl181",
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
- VMSTATE_UINT32(clock, pl181_state),
- VMSTATE_UINT32(power, pl181_state),
- VMSTATE_UINT32(cmdarg, pl181_state),
- VMSTATE_UINT32(cmd, pl181_state),
- VMSTATE_UINT32(datatimer, pl181_state),
- VMSTATE_UINT32(datalength, pl181_state),
- VMSTATE_UINT32(respcmd, pl181_state),
- VMSTATE_UINT32_ARRAY(response, pl181_state, 4),
- VMSTATE_UINT32(datactrl, pl181_state),
- VMSTATE_UINT32(datacnt, pl181_state),
- VMSTATE_UINT32(status, pl181_state),
- VMSTATE_UINT32_ARRAY(mask, pl181_state, 2),
- VMSTATE_INT32(fifo_pos, pl181_state),
- VMSTATE_INT32(fifo_len, pl181_state),
- VMSTATE_INT32(linux_hack, pl181_state),
- VMSTATE_UINT32_ARRAY(fifo, pl181_state, PL181_FIFO_LEN),
+ VMSTATE_UINT32(clock, PL181State),
+ VMSTATE_UINT32(power, PL181State),
+ VMSTATE_UINT32(cmdarg, PL181State),
+ VMSTATE_UINT32(cmd, PL181State),
+ VMSTATE_UINT32(datatimer, PL181State),
+ VMSTATE_UINT32(datalength, PL181State),
+ VMSTATE_UINT32(respcmd, PL181State),
+ VMSTATE_UINT32_ARRAY(response, PL181State, 4),
+ VMSTATE_UINT32(datactrl, PL181State),
+ VMSTATE_UINT32(datacnt, PL181State),
+ VMSTATE_UINT32(status, PL181State),
+ VMSTATE_UINT32_ARRAY(mask, PL181State, 2),
+ VMSTATE_INT32(fifo_pos, PL181State),
+ VMSTATE_INT32(fifo_len, PL181State),
+ VMSTATE_INT32(linux_hack, PL181State),
+ VMSTATE_UINT32_ARRAY(fifo, PL181State, PL181_FIFO_LEN),
VMSTATE_END_OF_LIST()
}
};
@@ -125,7 +125,7 @@ static const VMStateDescription vmstate_pl181 = {
static const unsigned char pl181_id[] =
{ 0x81, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
-static void pl181_update(pl181_state *s)
+static void pl181_update(PL181State *s)
{
int i;
for (i = 0; i < 2; i++) {
@@ -133,7 +133,7 @@ static void pl181_update(pl181_state *s)
}
}
-static void pl181_fifo_push(pl181_state *s, uint32_t value)
+static void pl181_fifo_push(PL181State *s, uint32_t value)
{
int n;
@@ -147,7 +147,7 @@ static void pl181_fifo_push(pl181_state *s, uint32_t value)
DPRINTF("FIFO push %08x\n", (int)value);
}
-static uint32_t pl181_fifo_pop(pl181_state *s)
+static uint32_t pl181_fifo_pop(PL181State *s)
{
uint32_t value;
@@ -162,7 +162,7 @@ static uint32_t pl181_fifo_pop(pl181_state *s)
return value;
}
-static void pl181_send_command(pl181_state *s)
+static void pl181_send_command(PL181State *s)
{
SDRequest request;
uint8_t response[16];
@@ -207,7 +207,7 @@ error:
the FIFO holding 32-bit words and the card taking data in single byte
chunks. FIFO bytes are transferred in little-endian order. */
-static void pl181_fifo_run(pl181_state *s)
+static void pl181_fifo_run(PL181State *s)
{
uint32_t bits;
uint32_t value = 0;
@@ -288,7 +288,7 @@ static void pl181_fifo_run(pl181_state *s)
static uint64_t pl181_read(void *opaque, hwaddr offset,
unsigned size)
{
- pl181_state *s = (pl181_state *)opaque;
+ PL181State *s = (PL181State *)opaque;
uint32_t tmp;
if (offset >= 0xfe0 && offset < 0x1000) {
@@ -372,7 +372,7 @@ static uint64_t pl181_read(void *opaque, hwaddr offset,
static void pl181_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
- pl181_state *s = (pl181_state *)opaque;
+ PL181State *s = (PL181State *)opaque;
switch (offset) {
case 0x00: /* Power */
@@ -449,7 +449,7 @@ static const MemoryRegionOps pl181_ops = {
static void pl181_reset(DeviceState *d)
{
- pl181_state *s = DO_UPCAST(pl181_state, busdev.qdev, d);
+ PL181State *s = DO_UPCAST(PL181State, busdev.qdev, d);
s->power = 0;
s->cmdarg = 0;
@@ -476,7 +476,7 @@ static void pl181_reset(DeviceState *d)
static int pl181_init(SysBusDevice *dev)
{
- pl181_state *s = FROM_SYSBUS(pl181_state, dev);
+ PL181State *s = FROM_SYSBUS(PL181State, dev);
DriveInfo *dinfo;
memory_region_init_io(&s->iomem, OBJECT(s), &pl181_ops, s, "pl181", 0x1000);
@@ -503,7 +503,7 @@ static void pl181_class_init(ObjectClass *klass, void *data)
static const TypeInfo pl181_info = {
.name = "pl181",
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(pl181_state),
+ .instance_size = sizeof(PL181State),
.class_init = pl181_class_init,
};