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| author | David Gibson <david@gibson.dropbear.id.au> | 2012-09-12 16:57:20 +0000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2012-10-04 15:54:18 +0200 |
| commit | 53724ee565565f69560dbe17553bede8c0169379 (patch) | |
| tree | ef73b2b50f6b30ee1c55c24da8ff858632ca9e3f /hw/spapr_vio.h | |
| parent | 490d4a2b6edafb27cd688ded7fdb1290453d71b0 (diff) | |
| download | qemu-53724ee565565f69560dbe17553bede8c0169379.tar.gz | |
pseries: Rework implementation of TCE bypass
On the pseries machine the IOMMU (aka TCE tables) is always active for all
PCI and VIO devices. Mostly to simplify the SLOF firmware, we implement an
extension which allows the IOMMU to be temporarily disabled for certain
devices.
Currently this is implemented by setting the device's DMAContext pointer to
NULL (thus reverting to qemu's default no-IOMMU DMA behaviour), then
replacing it when bypass mode is disabled.
This approach causes a bunch of complications though. It complexifies the
management of the DMAContext lifetimes, it's problematic for savevm/loadvm,
and it means that while bypass is active we have nowhere to store the
device's LIOBN (Logical IO Bus Number, used to identify DMA address
spaces). At present we regenerate the LIOBN from other address information
but this restricts how we can allocate LIOBNs.
This patch gives up on this approach, replacing it with the much simpler
one of having a 'bypass' boolean flag in the TCE state structure.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/spapr_vio.h')
| -rw-r--r-- | hw/spapr_vio.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/spapr_vio.h b/hw/spapr_vio.h index acef65efd3..cc85d26101 100644 --- a/hw/spapr_vio.h +++ b/hw/spapr_vio.h @@ -131,7 +131,6 @@ void spapr_vscsi_create(VIOsPAPRBus *bus); VIOsPAPRDevice *spapr_vty_get_default(VIOsPAPRBus *bus); -int spapr_tce_set_bypass(uint32_t unit, uint32_t enable); void spapr_vio_quiesce(void); #endif /* _HW_SPAPR_VIO_H */ |