diff options
| author | Gerd Hoffmann <kraxel@redhat.com> | 2012-05-24 12:04:50 +0200 |
|---|---|---|
| committer | Gerd Hoffmann <kraxel@redhat.com> | 2012-06-07 10:02:22 +0200 |
| commit | 7046530c36fa3a3f87692bdb54556f5d891a9c03 (patch) | |
| tree | a09a3ebcf65082a5bf1f84b2ff0b1a729818c193 /hw/usb | |
| parent | 0f588df8b3688b00e77aabaa32e26ece5f19bd39 (diff) | |
| download | qemu-7046530c36fa3a3f87692bdb54556f5d891a9c03.tar.gz | |
ehci: fix reset
Check for the reset bit first when processing USBCMD register writes.
Also break out of the switch, there is no need to check the other bits.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Diffstat (limited to 'hw/usb')
| -rw-r--r-- | hw/usb/hcd-ehci.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index f8ed80daee..3b602b04fa 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -1107,6 +1107,12 @@ static void ehci_mem_writel(void *ptr, target_phys_addr_t addr, uint32_t val) /* Do any register specific pre-write processing here. */ switch(addr) { case USBCMD: + if (val & USBCMD_HCRESET) { + ehci_reset(s); + val = s->usbcmd; + break; + } + if ((val & USBCMD_RUNSTOP) && !(s->usbcmd & USBCMD_RUNSTOP)) { qemu_mod_timer(s->frame_timer, qemu_get_clock_ns(vm_clock)); SET_LAST_RUN_CLOCK(s); @@ -1121,10 +1127,6 @@ static void ehci_mem_writel(void *ptr, target_phys_addr_t addr, uint32_t val) ehci_set_usbsts(s, USBSTS_HALT); } - if (val & USBCMD_HCRESET) { - ehci_reset(s); - val = s->usbcmd; - } /* not supporting dynamic frame list size at the moment */ if ((val & USBCMD_FLS) && !(s->usbcmd & USBCMD_FLS)) { |