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authorJan Beulich <jbeulich@suse.com>2015-06-02 15:07:01 +0000
committerStefano Stabellini <stefano.stabellini@eu.citrix.com>2015-06-02 15:07:01 +0000
commitc4ff1e68c621928abc680266cad0a451686c403b (patch)
tree70a66b388c63f9fcd7589411c25adb78bfe477c7 /hw/xen/xen_pt_config_init.c
parentd61bb2482dc0c7426f451f23ba7e2748ae2cc06d (diff)
downloadqemu-c4ff1e68c621928abc680266cad0a451686c403b.tar.gz
xen/pt: correctly handle PM status bit
xen_pt_pmcsr_reg_write() needs an adjustment to deal with the RW1C nature of the not passed through bit 15 (PCI_PM_CTRL_PME_STATUS). This is a preparatory patch for XSA-131. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Diffstat (limited to 'hw/xen/xen_pt_config_init.c')
-rw-r--r--hw/xen/xen_pt_config_init.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
index 516236a3f0..027ac324b3 100644
--- a/hw/xen/xen_pt_config_init.c
+++ b/hw/xen/xen_pt_config_init.c
@@ -948,7 +948,8 @@ static int xen_pt_pmcsr_reg_write(XenPCIPassthroughState *s,
/* create value for writing to I/O device register */
throughable_mask = ~reg->emu_mask & valid_mask;
- *val = XEN_PT_MERGE_VALUE(*val, dev_value, throughable_mask);
+ *val = XEN_PT_MERGE_VALUE(*val, dev_value & ~PCI_PM_CTRL_PME_STATUS,
+ throughable_mask);
return 0;
}