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| author | Jan Kiszka <jan.kiszka@siemens.com> | 2012-02-29 15:33:48 +0100 |
|---|---|---|
| committer | Jan Kiszka <jan.kiszka@siemens.com> | 2012-04-16 15:41:24 +0200 |
| commit | 6655124ddd6442b19a4b43b27e7d5a3846c4e6a8 (patch) | |
| tree | b70db5cf5ceac5f8f300f580b999d94e6f885f78 /hw | |
| parent | 0d6b9cc7420dd2d531b48508f0d4083d1c6a632a (diff) | |
| download | qemu-6655124ddd6442b19a4b43b27e7d5a3846c4e6a8.tar.gz | |
pcnet: Clear ERR in CSR0 on stop
pcnet_stop already clears any reason (BABL, CERR, MISS, MERR) why ERR
(bit 15) should be set in CRS0. So we have to clear that bit as well.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/pcnet.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/pcnet.c b/hw/pcnet.c index c53f06ef3b..7413409331 100644 --- a/hw/pcnet.c +++ b/hw/pcnet.c @@ -884,7 +884,7 @@ static void pcnet_stop(PCNetState *s) #ifdef PCNET_DEBUG printf("pcnet_stop\n"); #endif - s->csr[0] &= ~0x7feb; + s->csr[0] &= ~0xffeb; s->csr[0] |= 0x0014; s->csr[4] &= ~0x02c2; s->csr[5] &= ~0x0011; |