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| author | Peter Maydell <peter.maydell@linaro.org> | 2013-02-28 18:23:12 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-02-28 18:23:12 +0000 |
| commit | 6e392787c85809671033ec419d8e8ecf684d55da (patch) | |
| tree | 049a52a7d518f2fcdf1cd2ee4b7c1c9b8f1323be /hw | |
| parent | 5c78d6a84b504e831adc8f1917cde0c79061dff0 (diff) | |
| download | qemu-6e392787c85809671033ec419d8e8ecf684d55da.tar.gz | |
hw/pflash_cfi01: Make read after byte-write or erase return status
The Intel flash command set requires that a read operation after
doing a 'single byte write' command returns the status register;
add this case to pflash_read() so we return the correct information.
Similarly, the case for the 0x28 flavour of block erase was missing.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Tested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1358777318-7579-2-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/pflash_cfi01.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c index 9e6ff52336..c79e5995c2 100644 --- a/hw/pflash_cfi01.c +++ b/hw/pflash_cfi01.c @@ -162,7 +162,10 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, } break; + case 0x10: /* Single byte program */ case 0x20: /* Block erase */ + case 0x28: /* Block erase */ + case 0x40: /* single byte program */ case 0x50: /* Clear status register */ case 0x60: /* Block /un)lock */ case 0x70: /* Status Register */ |