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authorMeador Inge <meadori@codesourcery.com>2012-09-26 16:46:28 +0100
committerPeter Maydell <peter.maydell@linaro.org>2012-09-26 16:46:28 +0100
commit9892cae39562d2e6c00ccc5966302c00f23be6d4 (patch)
treebda6fdfeaad708944590b15726552ddd318d270b /hw
parent14c126baf1c38607c5bd988878de85a06cefd8cf (diff)
downloadqemu-9892cae39562d2e6c00ccc5966302c00f23be6d4.tar.gz
hw/armv7m_nvic: Correctly register GIC region when setting up NVIC
When setting up the NVIC memory regions the memory range 0x100..0xcff is aliased to an IO memory region that belongs to the ARM GIC. This aliased region should be added to the NVIC memory container, but the actual GIC IO memory region was being added instead. This mixup was causing the wrong IO memory access functions to be called when accessing parts of the NVIC memory. Signed-off-by: Meador Inge <meadori@codesourcery.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/armv7m_nvic.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c
index 6a0832eb3f..5c09116478 100644
--- a/hw/armv7m_nvic.c
+++ b/hw/armv7m_nvic.c
@@ -489,7 +489,8 @@ static int armv7m_nvic_init(SysBusDevice *dev)
*/
memory_region_init_alias(&s->gic_iomem_alias, "nvic-gic", &s->gic.iomem,
0x100, 0xc00);
- memory_region_add_subregion_overlap(&s->container, 0x100, &s->gic.iomem, 1);
+ memory_region_add_subregion_overlap(&s->container, 0x100,
+ &s->gic_iomem_alias, 1);
/* Map the whole thing into system memory at the location required
* by the v7M architecture.
*/