diff options
| author | Hu Tao <hutao@cn.fujitsu.com> | 2013-04-24 18:37:22 +0800 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-04-24 11:50:18 -0500 |
| commit | a3ac6b53d4e8ed6fa2ca1af87c68a8b7d5535220 (patch) | |
| tree | e0919cc795cc59f3883c94f9a21a796be56fdca8 /hw | |
| parent | bb71623811686ce3c34ce724f073f5c5dd95f51b (diff) | |
| download | qemu-a3ac6b53d4e8ed6fa2ca1af87c68a8b7d5535220.tar.gz | |
ich9: kill cmos_s3
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1366799842-18550-1-git-send-email-hutao@cn.fujitsu.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/acpi/ich9.c | 2 | ||||
| -rw-r--r-- | hw/i386/pc_q35.c | 15 | ||||
| -rw-r--r-- | hw/isa/lpc_ich9.c | 4 |
3 files changed, 4 insertions, 17 deletions
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index e663d297a1..4a17f32b96 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -203,7 +203,7 @@ static void pm_powerdown_req(Notifier *n, void *opaque) } void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, - qemu_irq sci_irq, qemu_irq cmos_s3) + qemu_irq sci_irq) { memory_region_init(&pm->io, "ich9-pm", ICH9_PMIO_SIZE); memory_region_set_enabled(&pm->io, false); diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 6ac1a89ad7..e5f417ee08 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -45,17 +45,6 @@ /* ICH9 AHCI has 6 ports */ #define MAX_SATA_PORTS 6 -/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE) - * BIOS will read it and start S3 resume at POST Entry */ -static void pc_cmos_set_s3_resume(void *opaque, int irq, int level) -{ - ISADevice *s = opaque; - - if (level) { - rtc_set_memory(s, 0xF, 0xFE); - } -} - /* PC hardware initialisation */ static void pc_q35_init(QEMUMachineInitArgs *args) { @@ -84,7 +73,6 @@ static void pc_q35_init(QEMUMachineInitArgs *args) int i; ICH9LPCState *ich9_lpc; PCIDevice *ahci; - qemu_irq *cmos_s3; pc_cpus_init(cpu_model); pc_acpi_init("q35-acpi-dsdt.aml"); @@ -175,8 +163,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args) pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false); /* connect pm stuff to lpc */ - cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1); - ich9_lpc_pm_init(lpc, *cmos_s3); + ich9_lpc_pm_init(lpc); /* ahci and SATA device, for q35 1 ahci controller is built-in */ ahci = pci_create_simple_multifunction(host_bus, diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index d116075933..667e882962 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -356,13 +356,13 @@ static void ich9_set_sci(void *opaque, int irq_num, int level) } } -void ich9_lpc_pm_init(PCIDevice *lpc_pci, qemu_irq cmos_s3) +void ich9_lpc_pm_init(PCIDevice *lpc_pci) { ICH9LPCState *lpc = ICH9_LPC_DEVICE(lpc_pci); qemu_irq *sci_irq; sci_irq = qemu_allocate_irqs(ich9_set_sci, lpc, 1); - ich9_pm_init(lpc_pci, &lpc->pm, sci_irq[0], cmos_s3); + ich9_pm_init(lpc_pci, &lpc->pm, sci_irq[0]); ich9_lpc_reset(&lpc->d.qdev); } |