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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2013-12-17 15:07:29 +1000
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-02-11 22:57:18 +1000
commitab1da85791340e504d10487e1add81b9988afa98 (patch)
treecb10f475f6c830ff9f45a6436eb96125bf220ef3 /hw
parentf606604f1c10b60ef294f1b9b229426521a365e3 (diff)
downloadqemu-ab1da85791340e504d10487e1add81b9988afa98.tar.gz
exec: Make stl_*_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/net/vmware_utils.h2
-rw-r--r--hw/pci/msi.c2
-rw-r--r--hw/pci/msix.c2
-rw-r--r--hw/ppc/ppc405_uc.c33
-rw-r--r--hw/ppc/spapr_hcall.c4
-rw-r--r--hw/s390x/css.c2
-rw-r--r--hw/s390x/s390-virtio-bus.c2
-rw-r--r--hw/s390x/virtio-ccw.c2
-rw-r--r--hw/scsi/megasas.c6
-rw-r--r--hw/scsi/vmw_pvscsi.c3
-rw-r--r--hw/sh4/r2d.c2
-rw-r--r--hw/timer/hpet.c3
-rw-r--r--hw/virtio/virtio.c4
13 files changed, 36 insertions, 31 deletions
diff --git a/hw/net/vmware_utils.h b/hw/net/vmware_utils.h
index 4cf0e79a1b..2ed73afbb0 100644
--- a/hw/net/vmware_utils.h
+++ b/hw/net/vmware_utils.h
@@ -104,7 +104,7 @@ static inline void
vmw_shmem_st32(hwaddr addr, uint32_t value)
{
VMW_SHPRN("SHMEM store32: %" PRIx64 " (value 0x%X)", addr, value);
- stl_le_phys(addr, value);
+ stl_le_phys(&address_space_memory, addr, value);
}
static inline uint64_t
diff --git a/hw/pci/msi.c b/hw/pci/msi.c
index 2a04d18884..a4a3040d4d 100644
--- a/hw/pci/msi.c
+++ b/hw/pci/msi.c
@@ -291,7 +291,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector)
"notify vector 0x%x"
" address: 0x%"PRIx64" data: 0x%"PRIx32"\n",
vector, msg.address, msg.data);
- stl_le_phys(msg.address, msg.data);
+ stl_le_phys(&address_space_memory, msg.address, msg.data);
}
/* Normally called by pci_default_write_config(). */
diff --git a/hw/pci/msix.c b/hw/pci/msix.c
index 3430770f33..5c49bfc304 100644
--- a/hw/pci/msix.c
+++ b/hw/pci/msix.c
@@ -439,7 +439,7 @@ void msix_notify(PCIDevice *dev, unsigned vector)
msg = msix_get_message(dev, vector);
- stl_le_phys(msg.address, msg.data);
+ stl_le_phys(&address_space_memory, msg.address, msg.data);
}
void msix_reset(PCIDevice *dev)
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 8109f92200..47a4242512 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -44,6 +44,7 @@
ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd,
uint32_t flags)
{
+ CPUState *cs = ENV_GET_CPU(env);
ram_addr_t bdloc;
int i, n;
@@ -52,30 +53,30 @@ ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd,
bdloc = 0x01000000UL - sizeof(struct ppc4xx_bd_info_t);
else
bdloc = bd->bi_memsize - sizeof(struct ppc4xx_bd_info_t);
- stl_be_phys(bdloc + 0x00, bd->bi_memstart);
- stl_be_phys(bdloc + 0x04, bd->bi_memsize);
- stl_be_phys(bdloc + 0x08, bd->bi_flashstart);
- stl_be_phys(bdloc + 0x0C, bd->bi_flashsize);
- stl_be_phys(bdloc + 0x10, bd->bi_flashoffset);
- stl_be_phys(bdloc + 0x14, bd->bi_sramstart);
- stl_be_phys(bdloc + 0x18, bd->bi_sramsize);
- stl_be_phys(bdloc + 0x1C, bd->bi_bootflags);
- stl_be_phys(bdloc + 0x20, bd->bi_ipaddr);
+ stl_be_phys(cs->as, bdloc + 0x00, bd->bi_memstart);
+ stl_be_phys(cs->as, bdloc + 0x04, bd->bi_memsize);
+ stl_be_phys(cs->as, bdloc + 0x08, bd->bi_flashstart);
+ stl_be_phys(cs->as, bdloc + 0x0C, bd->bi_flashsize);
+ stl_be_phys(cs->as, bdloc + 0x10, bd->bi_flashoffset);
+ stl_be_phys(cs->as, bdloc + 0x14, bd->bi_sramstart);
+ stl_be_phys(cs->as, bdloc + 0x18, bd->bi_sramsize);
+ stl_be_phys(cs->as, bdloc + 0x1C, bd->bi_bootflags);
+ stl_be_phys(cs->as, bdloc + 0x20, bd->bi_ipaddr);
for (i = 0; i < 6; i++) {
stb_phys(bdloc + 0x24 + i, bd->bi_enetaddr[i]);
}
stw_be_phys(bdloc + 0x2A, bd->bi_ethspeed);
- stl_be_phys(bdloc + 0x2C, bd->bi_intfreq);
- stl_be_phys(bdloc + 0x30, bd->bi_busfreq);
- stl_be_phys(bdloc + 0x34, bd->bi_baudrate);
+ stl_be_phys(cs->as, bdloc + 0x2C, bd->bi_intfreq);
+ stl_be_phys(cs->as, bdloc + 0x30, bd->bi_busfreq);
+ stl_be_phys(cs->as, bdloc + 0x34, bd->bi_baudrate);
for (i = 0; i < 4; i++) {
stb_phys(bdloc + 0x38 + i, bd->bi_s_version[i]);
}
for (i = 0; i < 32; i++) {
stb_phys(bdloc + 0x3C + i, bd->bi_r_version[i]);
}
- stl_be_phys(bdloc + 0x5C, bd->bi_plb_busfreq);
- stl_be_phys(bdloc + 0x60, bd->bi_pci_busfreq);
+ stl_be_phys(cs->as, bdloc + 0x5C, bd->bi_plb_busfreq);
+ stl_be_phys(cs->as, bdloc + 0x60, bd->bi_pci_busfreq);
for (i = 0; i < 6; i++) {
stb_phys(bdloc + 0x64 + i, bd->bi_pci_enetaddr[i]);
}
@@ -84,10 +85,10 @@ ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd,
for (i = 0; i < 6; i++)
stb_phys(bdloc + n++, bd->bi_pci_enetaddr2[i]);
}
- stl_be_phys(bdloc + n, bd->bi_opbfreq);
+ stl_be_phys(cs->as, bdloc + n, bd->bi_opbfreq);
n += 4;
for (i = 0; i < 2; i++) {
- stl_be_phys(bdloc + n, bd->bi_iic_fast[i]);
+ stl_be_phys(cs->as, bdloc + n, bd->bi_iic_fast[i]);
n += 4;
}
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 5ce43ab817..f47c3eca6f 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -573,7 +573,7 @@ static target_ulong h_logical_store(PowerPCCPU *cpu, sPAPREnvironment *spapr,
stw_phys(addr, val);
return H_SUCCESS;
case 4:
- stl_phys(addr, val);
+ stl_phys(cs->as, addr, val);
return H_SUCCESS;
case 8:
stq_phys(cs->as, addr, val);
@@ -638,7 +638,7 @@ static target_ulong h_logical_memop(PowerPCCPU *cpu, sPAPREnvironment *spapr,
stw_phys(dst, tmp);
break;
case 2:
- stl_phys(dst, tmp);
+ stl_phys(cs->as, dst, tmp);
break;
case 3:
stq_phys(cs->as, dst, tmp);
diff --git a/hw/s390x/css.c b/hw/s390x/css.c
index d42d7ecc1c..cfa8a9bf9f 100644
--- a/hw/s390x/css.c
+++ b/hw/s390x/css.c
@@ -670,7 +670,7 @@ static void css_update_chnmon(SubchDev *sch)
count = ldl_phys(&address_space_memory, sch->curr_status.mba);
count++;
- stl_phys(sch->curr_status.mba, count);
+ stl_phys(&address_space_memory, sch->curr_status.mba, count);
} else {
/* Format 0, global area. */
uint32_t offset;
diff --git a/hw/s390x/s390-virtio-bus.c b/hw/s390x/s390-virtio-bus.c
index 87a1591b20..277130675a 100644
--- a/hw/s390x/s390-virtio-bus.c
+++ b/hw/s390x/s390-virtio-bus.c
@@ -388,7 +388,7 @@ void s390_virtio_device_sync(VirtIOS390Device *dev)
cur_offs += num_vq * VIRTIO_VQCONFIG_LEN;
/* Sync feature bitmap */
- stl_le_phys(cur_offs, dev->host_features);
+ stl_le_phys(&address_space_memory, cur_offs, dev->host_features);
dev->feat_offs = cur_offs + dev->feat_len;
cur_offs += dev->feat_len * 2;
diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c
index 20ad77e779..4db10520ec 100644
--- a/hw/s390x/virtio-ccw.c
+++ b/hw/s390x/virtio-ccw.c
@@ -304,7 +304,7 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)
/* Return zeroes if the guest supports more feature bits. */
features.features = 0;
}
- stl_le_phys(ccw.cda, features.features);
+ stl_le_phys(&address_space_memory, ccw.cda, features.features);
sch->curr_status.scsw.count = ccw.count - sizeof(features);
ret = 0;
}
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index 673cb6106c..e12f80ccf6 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -521,7 +521,8 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
s->reply_queue_pa + queue_offset, context);
} else {
queue_offset = tail * sizeof(uint32_t);
- stl_le_phys(s->reply_queue_pa + queue_offset, context);
+ stl_le_phys(&address_space_memory,
+ s->reply_queue_pa + queue_offset, context);
}
s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds);
trace_megasas_qf_complete(context, tail, queue_offset,
@@ -1951,7 +1952,8 @@ static void megasas_mmio_write(void *opaque, hwaddr addr,
if (s->producer_pa && megasas_intr_enabled(s)) {
/* Update reply queue pointer */
trace_megasas_qf_update(s->reply_queue_head, s->busy);
- stl_le_phys(s->producer_pa, s->reply_queue_head);
+ stl_le_phys(&address_space_memory,
+ s->producer_pa, s->reply_queue_head);
if (!msix_enabled(pci_dev)) {
trace_megasas_irq_lower();
pci_irq_deassert(pci_dev);
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index 6cc6c1b036..7d344b944e 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -46,7 +46,8 @@
(ldl_le_phys(&address_space_memory, \
rs_pa + offsetof(struct PVSCSIRingsState, field)))
#define RS_SET_FIELD(rs_pa, field, val) \
- (stl_le_phys(rs_pa + offsetof(struct PVSCSIRingsState, field), val))
+ (stl_le_phys(&address_space_memory, \
+ rs_pa + offsetof(struct PVSCSIRingsState, field), val))
#define TYPE_PVSCSI "pvscsi"
#define PVSCSI(obj) OBJECT_CHECK(PVSCSIState, (obj), TYPE_PVSCSI)
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 7b1de85835..76ef8695e5 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -318,7 +318,7 @@ static void r2d_init(QEMUMachineInitArgs *args)
}
/* initialization which should be done by firmware */
- stl_phys(SH7750_BCR1, 1<<3); /* cs3 SDRAM */
+ stl_phys(&address_space_memory, SH7750_BCR1, 1<<3); /* cs3 SDRAM */
stw_phys(SH7750_BCR2, 3<<(3*2)); /* cs3 32bit */
reset_info->vector = (SDRAM_BASE + LINUX_LOAD_OFFSET) | 0xa0000000; /* Start from P2 area */
}
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 2fbbeb1735..1264dfd46a 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -206,7 +206,8 @@ static void update_irq(struct HPETTimer *timer, int set)
}
}
} else if (timer_fsb_route(timer)) {
- stl_le_phys(timer->fsb >> 32, timer->fsb & 0xffffffff);
+ stl_le_phys(&address_space_memory,
+ timer->fsb >> 32, timer->fsb & 0xffffffff);
} else if (timer->config & HPET_TN_TYPE_LEVEL) {
s->isr |= mask;
/* fold the ICH PIRQ# pin's internal inversion logic into hpet */
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index 3c2b0a035a..4606e68bf7 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -159,14 +159,14 @@ static inline void vring_used_ring_id(VirtQueue *vq, int i, uint32_t val)
{
hwaddr pa;
pa = vq->vring.used + offsetof(VRingUsed, ring[i].id);
- stl_phys(pa, val);
+ stl_phys(&address_space_memory, pa, val);
}
static inline void vring_used_ring_len(VirtQueue *vq, int i, uint32_t val)
{
hwaddr pa;
pa = vq->vring.used + offsetof(VRingUsed, ring[i].len);
- stl_phys(pa, val);
+ stl_phys(&address_space_memory, pa, val);
}
static uint16_t vring_used_idx(VirtQueue *vq)