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authorPeter Maydell <peter.maydell@linaro.org>2014-03-11 19:52:32 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-03-11 19:52:32 +0000
commitbe813ef02d18ba58e1ff32f1706bcacb88f1f764 (patch)
tree3d889dc429b445f68cb82b4bb74721c9f80e3b06 /hw
parent239618707637ec87eba8c452d2b2f75dc5ca20c7 (diff)
parent13f65b2e1073cf7e2c8fb3880c77d8a53fa2f95e (diff)
downloadqemu-be813ef02d18ba58e1ff32f1706bcacb88f1f764.tar.gz
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
acpi,pc,test bug fixes More small fixes: the issues annoy developers so I thought they are worth fixing quickly. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 11 Mar 2014 11:27:44 GMT using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: acpi-test: update expected SSDT files acpi-build: don't access unaligned addresses q35: Correct typo BRDIGE -> BRIDGE configure: don't modify .status on error pc: avoid duplicate names for ROM MRs loader: rename in_ram/has_mr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/core/loader.c14
-rw-r--r--hw/i386/acpi-build.c31
-rw-r--r--hw/i386/pc_piix.c3
-rw-r--r--hw/i386/pc_q35.c3
-rw-r--r--hw/pci-host/q35.c10
5 files changed, 33 insertions, 28 deletions
diff --git a/hw/core/loader.c b/hw/core/loader.c
index b323c0c7b8..2bf6b8ff85 100644
--- a/hw/core/loader.c
+++ b/hw/core/loader.c
@@ -54,7 +54,8 @@
#include <zlib.h>
-bool rom_file_in_ram = true;
+bool option_rom_has_mr = false;
+bool rom_file_has_mr = true;
static int roms_loaded;
@@ -642,7 +643,8 @@ static void *rom_set_mr(Rom *rom, Object *owner, const char *name)
}
int rom_add_file(const char *file, const char *fw_dir,
- hwaddr addr, int32_t bootindex)
+ hwaddr addr, int32_t bootindex,
+ bool option_rom)
{
Rom *rom;
int rc, fd = -1;
@@ -694,7 +696,7 @@ int rom_add_file(const char *file, const char *fw_dir,
basename);
snprintf(devpath, sizeof(devpath), "/rom@%s", fw_file_name);
- if (rom_file_in_ram) {
+ if ((!option_rom || option_rom_has_mr) && rom_file_has_mr) {
data = rom_set_mr(rom, OBJECT(fw_cfg), devpath);
} else {
data = rom->data;
@@ -738,7 +740,7 @@ void *rom_add_blob(const char *name, const void *blob, size_t len,
snprintf(devpath, sizeof(devpath), "/rom@%s", fw_file_name);
- if (rom_file_in_ram) {
+ if (rom_file_has_mr) {
data = rom_set_mr(rom, OBJECT(fw_cfg), devpath);
} else {
data = rom->data;
@@ -773,12 +775,12 @@ int rom_add_elf_program(const char *name, void *data, size_t datasize,
int rom_add_vga(const char *file)
{
- return rom_add_file(file, "vgaroms", 0, -1);
+ return rom_add_file(file, "vgaroms", 0, -1, true);
}
int rom_add_option(const char *file, int32_t bootindex)
{
- return rom_add_file(file, "genroms", 0, bootindex);
+ return rom_add_file(file, "genroms", 0, bootindex, true);
}
static void rom_reset(void *unused)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b667d31de5..7ecfd7004b 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -466,9 +466,15 @@ static void acpi_align_size(GArray *blob, unsigned align)
g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align));
}
-/* Get pointer within table in a safe manner */
-#define ACPI_BUILD_PTR(table, size, off, type) \
- ((type *)(acpi_data_get_ptr(table, size, off, sizeof(type))))
+/* Set a value within table in a safe manner */
+#define ACPI_BUILD_SET_LE(table, size, off, bits, val) \
+ do { \
+ uint64_t ACPI_BUILD_SET_LE_val = cpu_to_le64(val); \
+ memcpy(acpi_data_get_ptr(table, size, off, \
+ (bits) / BITS_PER_BYTE), \
+ &ACPI_BUILD_SET_LE_val, \
+ (bits) / BITS_PER_BYTE); \
+ } while (0)
static inline void *acpi_data_get_ptr(uint8_t *table_data, unsigned table_size,
unsigned off, unsigned size)
@@ -974,22 +980,17 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state)
static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size)
{
- *ACPI_BUILD_PTR(start, size, acpi_pci32_start[0], uint32_t) =
- cpu_to_le32(pci->w32.begin);
+ ACPI_BUILD_SET_LE(start, size, acpi_pci32_start[0], 32, pci->w32.begin);
- *ACPI_BUILD_PTR(start, size, acpi_pci32_end[0], uint32_t) =
- cpu_to_le32(pci->w32.end - 1);
+ ACPI_BUILD_SET_LE(start, size, acpi_pci32_end[0], 32, pci->w32.end - 1);
if (pci->w64.end || pci->w64.begin) {
- *ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t) = 1;
- *ACPI_BUILD_PTR(start, size, acpi_pci64_start[0], uint64_t) =
- cpu_to_le64(pci->w64.begin);
- *ACPI_BUILD_PTR(start, size, acpi_pci64_end[0], uint64_t) =
- cpu_to_le64(pci->w64.end - 1);
- *ACPI_BUILD_PTR(start, size, acpi_pci64_length[0], uint64_t) =
- cpu_to_le64(pci->w64.end - pci->w64.begin);
+ ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 1);
+ ACPI_BUILD_SET_LE(start, size, acpi_pci64_start[0], 64, pci->w64.begin);
+ ACPI_BUILD_SET_LE(start, size, acpi_pci64_end[0], 64, pci->w64.end - 1);
+ ACPI_BUILD_SET_LE(start, size, acpi_pci64_length[0], 64, pci->w64.end - pci->w64.begin);
} else {
- *ACPI_BUILD_PTR(start, size, acpi_pci64_valid[0], uint8_t) = 0;
+ ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 0);
}
}
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index ae1699d6db..5e1d2d3de3 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -266,13 +266,14 @@ static void pc_compat_1_7(QEMUMachineInitArgs *args)
{
smbios_type1_defaults = false;
gigabyte_align = false;
+ option_rom_has_mr = true;
}
static void pc_compat_1_6(QEMUMachineInitArgs *args)
{
pc_compat_1_7(args);
has_pci_info = false;
- rom_file_in_ram = false;
+ rom_file_has_mr = false;
has_acpi_build = false;
}
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index a7f626096a..4b0456a95b 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -244,13 +244,14 @@ static void pc_compat_1_7(QEMUMachineInitArgs *args)
{
smbios_type1_defaults = false;
gigabyte_align = false;
+ option_rom_has_mr = true;
}
static void pc_compat_1_6(QEMUMachineInitArgs *args)
{
pc_compat_1_7(args);
has_pci_info = false;
- rom_file_in_ram = false;
+ rom_file_has_mr = false;
has_acpi_build = false;
}
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 4bc2e0118e..8b8cc4e294 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -272,7 +272,7 @@ static void mch_update_smram(MCHPCIState *mch)
PCIDevice *pd = PCI_DEVICE(mch);
memory_region_transaction_begin();
- smram_update(&mch->smram_region, pd->config[MCH_HOST_BRDIGE_SMRAM],
+ smram_update(&mch->smram_region, pd->config[MCH_HOST_BRIDGE_SMRAM],
mch->smm_enabled);
memory_region_transaction_commit();
}
@@ -283,7 +283,7 @@ static void mch_set_smm(int smm, void *arg)
PCIDevice *pd = PCI_DEVICE(mch);
memory_region_transaction_begin();
- smram_set_smm(&mch->smm_enabled, smm, pd->config[MCH_HOST_BRDIGE_SMRAM],
+ smram_set_smm(&mch->smm_enabled, smm, pd->config[MCH_HOST_BRIDGE_SMRAM],
&mch->smram_region);
memory_region_transaction_commit();
}
@@ -306,8 +306,8 @@ static void mch_write_config(PCIDevice *d,
mch_update_pciexbar(mch);
}
- if (ranges_overlap(address, len, MCH_HOST_BRDIGE_SMRAM,
- MCH_HOST_BRDIGE_SMRAM_SIZE)) {
+ if (ranges_overlap(address, len, MCH_HOST_BRIDGE_SMRAM,
+ MCH_HOST_BRIDGE_SMRAM_SIZE)) {
mch_update_smram(mch);
}
}
@@ -347,7 +347,7 @@ static void mch_reset(DeviceState *qdev)
pci_set_quad(d->config + MCH_HOST_BRIDGE_PCIEXBAR,
MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT);
- d->config[MCH_HOST_BRDIGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT;
+ d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT;
mch_update(mch);
}