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authorBen Herrenschmidt <benh@kernel.crashing.org>2012-11-12 16:46:50 +0000
committerAlexander Graf <agraf@suse.de>2012-12-14 13:12:53 +0100
commitbf3bc4c4e992fb9914e2f1f7e8a569394d298b57 (patch)
treeeb4b570731550ed109e8a5942f25fa998c7e6ae1 /hw
parent044f4c8b0ee90290b6cbbc616c4be3c8aeffcaab (diff)
downloadqemu-bf3bc4c4e992fb9914e2f1f7e8a569394d298b57.tar.gz
pseries: Use #define for XICS base irq number
Currently the lowest "real" irq number for the XICS irq controller (as opposed to numbers reserved for IPIs and other special purposes) is hard coded as 16 in two places - in xics_system_init() and in spapr.c. As well as being generally bad practice, we're going to need to change this number soon to fit in with the in-kernel XICS implementation. This patch adds a #define for this number to avoid future breakage. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw')
-rw-r--r--hw/spapr.c2
-rw-r--r--hw/xics.c2
-rw-r--r--hw/xics.h1
3 files changed, 3 insertions, 2 deletions
diff --git a/hw/spapr.c b/hw/spapr.c
index ad3f0ea7fc..eafee0313d 100644
--- a/hw/spapr.c
+++ b/hw/spapr.c
@@ -801,7 +801,7 @@ static void ppc_spapr_init(QEMUMachineInitArgs *args)
/* Set up Interrupt Controller */
spapr->icp = xics_system_init(XICS_IRQS);
- spapr->next_irq = 16;
+ spapr->next_irq = XICS_IRQ_BASE;
/* Set up EPOW events infrastructure */
spapr_events_init(spapr);
diff --git a/hw/xics.c b/hw/xics.c
index edf58339c0..b8887cd9c7 100644
--- a/hw/xics.c
+++ b/hw/xics.c
@@ -549,7 +549,7 @@ struct icp_state *xics_system_init(int nr_irqs)
ics = g_malloc0(sizeof(*ics));
ics->nr_irqs = nr_irqs;
- ics->offset = 16;
+ ics->offset = XICS_IRQ_BASE;
ics->irqs = g_malloc0(nr_irqs * sizeof(struct ics_irq_state));
icp->ics = ics;
diff --git a/hw/xics.h b/hw/xics.h
index 6817268697..c3bf0083e2 100644
--- a/hw/xics.h
+++ b/hw/xics.h
@@ -28,6 +28,7 @@
#define __XICS_H__
#define XICS_IPI 0x2
+#define XICS_IRQ_BASE 0x10
struct icp_state;