diff options
| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-02-28 18:23:15 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-02-28 18:49:24 +0000 |
| commit | e3f9d31c9899cc94e124b042d7d5353dbfd812ca (patch) | |
| tree | 393df0f203bba63ac75407241dbc7f8055789ed5 /hw | |
| parent | a7fd6915d84b20d5ff9ae287ddfabb9b222e7067 (diff) | |
| download | qemu-e3f9d31c9899cc94e124b042d7d5353dbfd812ca.tar.gz | |
cadence_gem: Flush queued packets
The device needs to check for queued RX packets when the RX path is re-enabled.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1fa8c88a3b7c654886d0a7484c2463cd4c2a2781.1360901435.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/cadence_gem.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c index ab86c1702d..e6032ea44f 100644 --- a/hw/cadence_gem.c +++ b/hw/cadence_gem.c @@ -1106,6 +1106,9 @@ static void gem_write(void *opaque, hwaddr offset, uint64_t val, /* Reset to start of Q when receive disabled. */ s->rx_desc_addr = s->regs[GEM_RXQBASE]; } + if (val & GEM_NWCTRL_RXENA) { + qemu_flush_queued_packets(qemu_get_queue(s->nic)); + } break; case GEM_TXSTATUS: |