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authorBlue Swirl <blauwirbel@gmail.com>2010-03-18 18:41:57 +0000
committerBlue Swirl <blauwirbel@gmail.com>2010-03-18 18:41:57 +0000
commit43dc2a645e00e6761a741e3d16c27c5b5a373b66 (patch)
treedaf9f3fd9fa34306ac03fbb6efc72860efc879ca /hw
parent609c1daced7f444f9f6569bba72d6a56a697ac95 (diff)
downloadqemu-43dc2a645e00e6761a741e3d16c27c5b5a373b66.tar.gz
Replace assert(0) with abort() or cpu_abort()
When building with -DNDEBUG, assert(0) will not stop execution so it must not be used for abnormal termination. Use cpu_abort() when in CPU context, abort() otherwise. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/sh7750.c30
-rw-r--r--hw/sh_intc.c6
-rw-r--r--hw/sh_serial.c4
-rw-r--r--hw/sm501.c12
-rw-r--r--hw/tc58128.c8
5 files changed, 30 insertions, 30 deletions
diff --git a/hw/sh7750.c b/hw/sh7750.c
index 9c39f4b68b..0291d5fd49 100644
--- a/hw/sh7750.c
+++ b/hw/sh7750.c
@@ -206,7 +206,7 @@ static uint32_t sh7750_mem_readb(void *opaque, target_phys_addr_t addr)
switch (addr) {
default:
error_access("byte read", addr);
- assert(0);
+ abort();
}
}
@@ -240,7 +240,7 @@ static uint32_t sh7750_mem_readw(void *opaque, target_phys_addr_t addr)
return 0;
default:
error_access("word read", addr);
- assert(0);
+ abort();
}
}
@@ -287,7 +287,7 @@ static uint32_t sh7750_mem_readl(void *opaque, target_phys_addr_t addr)
return s->cpu->prr;
default:
error_access("long read", addr);
- assert(0);
+ abort();
}
}
@@ -303,7 +303,7 @@ static void sh7750_mem_writeb(void *opaque, target_phys_addr_t addr,
}
error_access("byte write", addr);
- assert(0);
+ abort();
}
static void sh7750_mem_writew(void *opaque, target_phys_addr_t addr,
@@ -349,12 +349,12 @@ static void sh7750_mem_writew(void *opaque, target_phys_addr_t addr,
s->gpioic = mem_value;
if (mem_value != 0) {
fprintf(stderr, "I/O interrupts not implemented\n");
- assert(0);
+ abort();
}
return;
default:
error_access("word write", addr);
- assert(0);
+ abort();
}
}
@@ -433,7 +433,7 @@ static void sh7750_mem_writel(void *opaque, target_phys_addr_t addr,
return;
default:
error_access("long write", addr);
- assert(0);
+ abort();
}
}
@@ -618,7 +618,7 @@ static struct intc_group groups_irl[] = {
static uint32_t invalid_read(void *opaque, target_phys_addr_t addr)
{
- assert(0);
+ abort();
return 0;
}
@@ -635,7 +635,7 @@ static uint32_t sh7750_mmct_readl(void *opaque, target_phys_addr_t addr)
case MM_ITLB_ADDR:
case MM_ITLB_DATA:
/* XXXXX */
- assert(0);
+ abort();
break;
case MM_OCACHE_ADDR:
case MM_OCACHE_DATA:
@@ -644,10 +644,10 @@ static uint32_t sh7750_mmct_readl(void *opaque, target_phys_addr_t addr)
case MM_UTLB_ADDR:
case MM_UTLB_DATA:
/* XXXXX */
- assert(0);
+ abort();
break;
default:
- assert(0);
+ abort();
}
return ret;
@@ -656,7 +656,7 @@ static uint32_t sh7750_mmct_readl(void *opaque, target_phys_addr_t addr)
static void invalid_write(void *opaque, target_phys_addr_t addr,
uint32_t mem_value)
{
- assert(0);
+ abort();
}
static void sh7750_mmct_writel(void *opaque, target_phys_addr_t addr,
@@ -672,7 +672,7 @@ static void sh7750_mmct_writel(void *opaque, target_phys_addr_t addr,
case MM_ITLB_ADDR:
case MM_ITLB_DATA:
/* XXXXX */
- assert(0);
+ abort();
break;
case MM_OCACHE_ADDR:
case MM_OCACHE_DATA:
@@ -683,10 +683,10 @@ static void sh7750_mmct_writel(void *opaque, target_phys_addr_t addr,
break;
case MM_UTLB_DATA:
/* XXXXX */
- assert(0);
+ abort();
break;
default:
- assert(0);
+ abort();
break;
}
}
diff --git a/hw/sh_intc.c b/hw/sh_intc.c
index b6f45f0177..da36d32b1d 100644
--- a/hw/sh_intc.c
+++ b/hw/sh_intc.c
@@ -105,7 +105,7 @@ int sh_intc_get_pending_vector(struct intc_desc *desc, int imask)
}
}
- assert(0);
+ abort();
}
#define INTC_MODE_NONE 0
@@ -181,7 +181,7 @@ static void sh_intc_locate(struct intc_desc *desc,
}
}
- assert(0);
+ abort();
}
static void sh_intc_toggle_mask(struct intc_desc *desc, intc_enum id,
@@ -260,7 +260,7 @@ static void sh_intc_write(void *opaque, target_phys_addr_t offset,
case INTC_MODE_ENABLE_REG | INTC_MODE_IS_PRIO: break;
case INTC_MODE_DUAL_SET: value |= *valuep; break;
case INTC_MODE_DUAL_CLR: value = *valuep & ~value; break;
- default: assert(0);
+ default: abort();
}
for (k = 0; k <= first; k++) {
diff --git a/hw/sh_serial.c b/hw/sh_serial.c
index 2447b919b8..93dc144a34 100644
--- a/hw/sh_serial.c
+++ b/hw/sh_serial.c
@@ -182,7 +182,7 @@ static void sh_serial_ioport_write(void *opaque, uint32_t offs, uint32_t val)
}
fprintf(stderr, "sh_serial: unsupported write to 0x%02x\n", offs);
- assert(0);
+ abort();
}
static uint32_t sh_serial_ioport_read(void *opaque, uint32_t offs)
@@ -282,7 +282,7 @@ static uint32_t sh_serial_ioport_read(void *opaque, uint32_t offs)
if (ret & ~((1 << 16) - 1)) {
fprintf(stderr, "sh_serial: unsupported read from 0x%02x\n", offs);
- assert(0);
+ abort();
}
return ret;
diff --git a/hw/sm501.c b/hw/sm501.c
index cd1f5959ee..80185864c4 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -596,7 +596,7 @@ static inline uint16_t get_hwc_color(SM501State *state, int crt, int index)
break;
default:
printf("invalid hw cursor color.\n");
- assert(0);
+ abort();
}
switch (index) {
@@ -663,7 +663,7 @@ static uint32_t sm501_system_config_read(void *opaque, target_phys_addr_t addr)
default:
printf("sm501 system config : not implemented register read."
" addr=%x\n", (int)addr);
- assert(0);
+ abort();
}
return ret;
@@ -713,7 +713,7 @@ static void sm501_system_config_write(void *opaque,
default:
printf("sm501 system config : not implemented register write."
" addr=%x, val=%x\n", (int)addr, value);
- assert(0);
+ abort();
}
}
@@ -843,7 +843,7 @@ static uint32_t sm501_disp_ctrl_read(void *opaque, target_phys_addr_t addr)
default:
printf("sm501 disp ctrl : not implemented register read."
" addr=%x\n", (int)addr);
- assert(0);
+ abort();
}
return ret;
@@ -951,7 +951,7 @@ static void sm501_disp_ctrl_write(void *opaque,
default:
printf("sm501 disp ctrl : not implemented register write."
" addr=%x, val=%x\n", (int)addr, value);
- assert(0);
+ abort();
}
}
@@ -1097,7 +1097,7 @@ static void sm501_draw_crt(SM501State * s)
default:
printf("sm501 draw crt : invalid DC_CRT_CONTROL=%x.\n",
s->dc_crt_control);
- assert(0);
+ abort();
break;
}
diff --git a/hw/tc58128.c b/hw/tc58128.c
index 264aa028da..672a01c467 100644
--- a/hw/tc58128.c
+++ b/hw/tc58128.c
@@ -82,7 +82,7 @@ static void handle_command(tc58128_dev * dev, uint8_t command)
break;
default:
fprintf(stderr, "unknown flash command 0x%02x\n", command);
- assert(0);
+ abort();
}
}
@@ -110,12 +110,12 @@ static void handle_address(tc58128_dev * dev, uint8_t data)
break;
default:
/* Invalid data */
- assert(0);
+ abort();
}
dev->address_cycle++;
break;
default:
- assert(0);
+ abort();
}
}
@@ -164,7 +164,7 @@ static int tc58128_cb(uint16_t porta, uint16_t portb,
*periph_pdtra &= 0xff00;
*periph_pdtra |= handle_read(&tc58128_devs[dev]);
} else {
- assert(0);
+ abort();
}
return 1;
}