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| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2015-05-14 19:23:21 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-05-18 16:41:13 +0100 |
| commit | 3bade2a9e6336e0eb7cc5ad7425994f1143c5cfa (patch) | |
| tree | b0b46899b6e4a87d1f0c0d132485cb17884858ed /hw | |
| parent | 8ae57b2fa35dae9aa4b50db5e632156eded9bec0 (diff) | |
| download | qemu-3bade2a9e6336e0eb7cc5ad7425994f1143c5cfa.tar.gz | |
arm: xlnx-zynqmp: Add UART support
There are 2x Cadence UARTs in Zynq MP. Add them.
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: e30795536f77599fabc1052278d846ccd52322e2.1431381507.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/arm/xlnx-zynqmp.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 456dea0a6c..6b019651ac 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -36,6 +36,14 @@ static const int gem_intr[XLNX_ZYNQMP_NUM_GEMS] = { 57, 59, 61, 63, }; +static const uint64_t uart_addr[XLNX_ZYNQMP_NUM_UARTS] = { + 0xFF000000, 0xFF010000, +}; + +static const int uart_intr[XLNX_ZYNQMP_NUM_UARTS] = { + 21, 22, +}; + typedef struct XlnxZynqMPGICRegion { int region_index; uint32_t address; @@ -70,6 +78,11 @@ static void xlnx_zynqmp_init(Object *obj) object_initialize(&s->gem[i], sizeof(s->gem[i]), TYPE_CADENCE_GEM); qdev_set_parent_bus(DEVICE(&s->gem[i]), sysbus_get_default()); } + + for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) { + object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_CADENCE_UART); + qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default()); + } } static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) @@ -162,6 +175,17 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem[i]), 0, gic_spi[gem_intr[i]]); } + + for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) { + object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err); + if (err) { + error_propagate((errp), (err)); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, uart_addr[i]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, + gic_spi[uart_intr[i]]); + } } static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data) |