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authorJason Wang <jasowang@redhat.com>2016-12-30 18:09:16 +0800
committerMichael S. Tsirkin <mst@redhat.com>2017-01-10 05:56:59 +0200
commitbd2baaccd521a9cfcc56e0a9a69c903fcee56aa4 (patch)
treef2d5d67e42589bd55683f554f785d56e8266ae86 /hw
parent615c4ed20598ab3eda5e071ba7ba2a5bf70be59f (diff)
downloadqemu-bd2baaccd521a9cfcc56e0a9a69c903fcee56aa4.tar.gz
acpi: add ATSR for q35
This patch provides ATSR which was a requirement for software that wants to enable ATS on endpoint devices behind a Root Port. This is done simply by setting ALL_PORTS which indicates all PCI-Express Root Ports support ATS transactions. Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/i386/acpi-build.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 42ecf619d5..4609db1359 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2575,6 +2575,7 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker)
AcpiTableDmar *dmar;
AcpiDmarHardwareUnit *drhd;
+ AcpiDmarRootPortATS *atsr;
uint8_t dmar_flags = 0;
X86IOMMUState *iommu = x86_iommu_get_default();
AcpiDmarDeviceScope *scope = NULL;
@@ -2608,6 +2609,14 @@ build_dmar_q35(GArray *table_data, BIOSLinker *linker)
scope->path[0].device = PCI_SLOT(Q35_PSEUDO_DEVFN_IOAPIC);
scope->path[0].function = PCI_FUNC(Q35_PSEUDO_DEVFN_IOAPIC);
+ if (iommu->dt_supported) {
+ atsr = acpi_data_push(table_data, sizeof(*atsr));
+ atsr->type = cpu_to_le16(ACPI_DMAR_TYPE_ATSR);
+ atsr->length = cpu_to_le16(sizeof(*atsr));
+ atsr->flags = ACPI_DMAR_ATSR_ALL_PORTS;
+ atsr->pci_segment = cpu_to_le16(0);
+ }
+
build_header(linker, table_data, (void *)(table_data->data + dmar_start),
"DMAR", table_data->len - dmar_start, 1, NULL, NULL);
}