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authorLaurent Vivier <lvivier@redhat.com>2017-03-21 11:25:42 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2017-03-22 11:32:42 +1100
commit55641213fc81cdfc3bcd56c9e9991faa119201b2 (patch)
treef48f41e82bdafedf094dfc0d03f55cbde2fb9c33 /hw
parent55a19ad8b2d0797e3a8fe90ab99a9bb713824059 (diff)
downloadqemu-55641213fc81cdfc3bcd56c9e9991faa119201b2.tar.gz
numa,spapr: align default numa node memory size to 256MB
Since commit 224245b ("spapr: Add LMB DR connectors"), NUMA node memory size must be aligned to 256MB (SPAPR_MEMORY_BLOCK_SIZE). But when "-numa" option is provided without "mem" parameter, the memory is equally divided between nodes, but 8MB aligned. This can be not valid for pseries. In that case we can have: $ ./ppc64-softmmu/qemu-system-ppc64 -m 4G -numa node -numa node -numa node qemu-system-ppc64: Node 0 memory size 0x55000000 is not aligned to 256 MiB With this patch, we have: (qemu) info numa 3 nodes node 0 cpus: 0 node 0 size: 1280 MB node 1 cpus: node 1 size: 1280 MB node 2 cpus: node 2 size: 1536 MB Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw')
-rw-r--r--hw/core/machine.c5
-rw-r--r--hw/ppc/spapr.c6
2 files changed, 11 insertions, 0 deletions
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 0d92672203..ada9eea483 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -396,6 +396,11 @@ static void machine_class_init(ObjectClass *oc, void *data)
mc->default_ram_size = 128 * M_BYTE;
mc->rom_file_has_mr = true;
+ /* numa node memory size aligned on 8MB by default.
+ * On Linux, each node's border has to be 8MB aligned
+ */
+ mc->numa_mem_align_shift = 23;
+
object_class_property_add_str(oc, "accel",
machine_get_accel, machine_set_accel, &error_abort);
object_class_property_set_description(oc, "accel",
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 6ee566d658..8aecea3dd1 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3096,6 +3096,11 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
xic->ics_resend = spapr_ics_resend;
xic->icp_get = spapr_icp_get;
ispc->print_info = spapr_pic_print_info;
+ /* Force NUMA node memory size to be a multiple of
+ * SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity
+ * in which LMBs are represented and hot-added
+ */
+ mc->numa_mem_align_shift = 28;
}
static const TypeInfo spapr_machine_info = {
@@ -3180,6 +3185,7 @@ static void spapr_machine_2_8_class_options(MachineClass *mc)
{
spapr_machine_2_9_class_options(mc);
SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_8);
+ mc->numa_mem_align_shift = 23;
}
DEFINE_SPAPR_MACHINE(2_8, "2.8", false);