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authorPeter Maydell <peter.maydell@linaro.org>2018-05-04 10:13:13 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-05-04 10:13:13 +0100
commit2e4bd4a286ccfadc41165aea413f0abc28beed3e (patch)
tree23f7df3d91cc476834c896c433a2469c6e6db6d2 /include
parentf0c889522255b8fee2fe3a6cc8157dfa80abac2a (diff)
parent0550b1206a91d66051a21441a02c4ff126b531fe (diff)
downloadqemu-2e4bd4a286ccfadc41165aea413f0abc28beed3e.tar.gz
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.13-20180504' into staging
ppc patch queue 2018-05-04 Second patch of patches for qemu-2.13 (or whatever the version ends up being called). Highlights are: * Preliminary patches for POWER9 hash MMU support for powernv * A number of cleanups fo pseries startup and LPCR handling * Remove support for explicitly allocated RMAs (which require kernel support that's been gone for 3+ years) * Some mac_newworld cleanups * A few bugfixes # gpg: Signature made Fri 04 May 2018 06:07:43 BST # gpg: using RSA key 6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.13-20180504: spapr: don't advertise radix GTSE if max-compat-cpu < power9 spapr: don't migrate "spapr_option_vector_ov5_cas" to pre 2.8 machines target/ppc: always set PPC_MEM_TLBIE in pre 2.8 migration hack mac_newworld: move wiring of macio IRQs to macio_newworld_realize() mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly uninorth: create new uninorth device spapr: Clean up handling of LPCR power-saving exit bits spapr: Move PAPR mode cpu setup fully to spapr code target/ppc: Delay initialization of LPCR_UPRT for secondary cpus spapr: Clean up LPCR updates from hypercalls spapr: Make a helper to set up cpu entry point state spapr: Remove unhelpful helpers from rtas_start_cpu() spapr: Clean up rtas_start_cpu() & rtas_stop_self() target/ppc: Add ppc_store_lpcr() helper spapr: Remove support for explicitly allocated RMAs target/ppc: add basic support for PTCR on POWER9 target/ppc: return a nil HPT base address on sPAPR machines Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/misc/macio/macio.h1
-rw-r--r--include/hw/pci-host/uninorth.h11
-rw-r--r--include/hw/ppc/spapr_cpu_core.h3
3 files changed, 14 insertions, 1 deletions
diff --git a/include/hw/misc/macio/macio.h b/include/hw/misc/macio/macio.h
index 64a2584a77..838eaf1db0 100644
--- a/include/hw/misc/macio/macio.h
+++ b/include/hw/misc/macio/macio.h
@@ -71,7 +71,6 @@ typedef struct NewWorldMacIOState {
/*< public >*/
OpenPICState *pic;
- qemu_irq irqs[7];
MACIOIDEState ide[2];
} NewWorldMacIOState;
diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h
index f0e6836c76..f6654bad9b 100644
--- a/include/hw/pci-host/uninorth.h
+++ b/include/hw/pci-host/uninorth.h
@@ -53,4 +53,15 @@ typedef struct UNINHostState {
MemoryRegion pci_io;
} UNINHostState;
+typedef struct UNINState {
+ SysBusDevice parent_obj;
+
+ MemoryRegion mem;
+ int token[1];
+} UNINState;
+
+#define TYPE_UNI_NORTH "uni-north"
+#define UNI_NORTH(obj) \
+ OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH)
+
#endif /* UNINORTH_H */
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 1129f344aa..47dcfda12b 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -12,6 +12,7 @@
#include "hw/qdev.h"
#include "hw/cpu/core.h"
#include "target/ppc/cpu-qom.h"
+#include "target/ppc/cpu.h"
#define TYPE_SPAPR_CPU_CORE "spapr-cpu-core"
#define SPAPR_CPU_CORE(obj) \
@@ -38,4 +39,6 @@ typedef struct sPAPRCPUCoreClass {
} sPAPRCPUCoreClass;
const char *spapr_get_cpu_core_type(const char *cpu_type);
+void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_ulong r3);
+
#endif