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| author | Michael S. Tsirkin <mst@redhat.com> | 2013-08-27 08:37:26 +0300 |
|---|---|---|
| committer | Michael Roth <mdroth@linux.vnet.ibm.com> | 2013-09-24 19:12:03 -0500 |
| commit | a73c74f63aa8f977ece88c97280a03ea9b1ca395 (patch) | |
| tree | b27c8a616f3c0d66ae49b508da5945fb41cc0662 /include | |
| parent | 964e0d4ec52ea7400ccc69de69b05ac913bbfff8 (diff) | |
| download | qemu-a73c74f63aa8f977ece88c97280a03ea9b1ca395.tar.gz | |
pc: fix regression for 64 bit PCI memory
commit 398489018183d613306ab022653552247d93919f
pc: limit 64 bit hole to 2G by default
introduced a way for management to control
the window allocated to the 64 bit PCI hole.
This is useful, but existing management tools do not know how to set
this property. As a result, e.g. specifying a large ivshmem device with
size > 4G is broken by default. For example this configuration no
longer works:
-device ivshmem,size=4294967296,chardev=cfoo
-chardev socket,path=/tmp/sock,id=cfoo,server,nowait
Fix this by detecting that hole size was not specified
and defaulting to the backwards-compatible value of 1 << 62.
Cc: qemu-stable@nongnu.org
Cc: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
(cherry picked from commit 1466cef32dd5e7ef3c6477e96d85d92302ad02e3)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/i386/pc.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index f79d4782c1..475ba9ee2d 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -106,7 +106,16 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" -#define DEFAULT_PCI_HOLE64_SIZE (1ULL << 31) +#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) + +static inline uint64_t pci_host_get_hole64_size(uint64_t pci_hole64_size) +{ + if (pci_hole64_size == DEFAULT_PCI_HOLE64_SIZE) { + return 1ULL << 62; + } else { + return pci_hole64_size; + } +} void pc_init_pci64_hole(PcPciInfo *pci_info, uint64_t pci_hole64_start, uint64_t pci_hole64_size); |