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| author | Anthony Liguori <anthony@codemonkey.ws> | 2013-09-23 11:52:55 -0500 |
|---|---|---|
| committer | Anthony Liguori <anthony@codemonkey.ws> | 2013-09-23 11:52:55 -0500 |
| commit | 2e6ae666c8ccaa7fd26d7102c5c9bed24dc02b1d (patch) | |
| tree | 506ea140053974266577f7563998d7173cd5905d /include | |
| parent | 3e4be9c29784df09c364b52a55e826a0b05b950e (diff) | |
| parent | 7a1c0d200f3ca5be48f7034c6ed5458e490f8816 (diff) | |
| download | qemu-2e6ae666c8ccaa7fd26d7102c5c9bed24dc02b1d.tar.gz | |
Merge remote-tracking branch 'mjt/trivial-patches' into staging
# By Stefan Weil (8) and others
# Via Michael Tokarev
* mjt/trivial-patches:
tests/.gitignore: ignore test-throttle
exec: Fix broken build for MinGW (regression)
kvm: Fix compiler warning (clang)
tcg-sparc: Fix parenthesis warning
Makefile: Remove some more files when cleaning
target-i386: Fix segment cache dump
iov: avoid "orig_len may be used unitialized" warning
vscclient: remove unnecessary use of uninitialized variable
trace-events: Clean up with scripts/cleanup-trace-events.pl again
tci: Fix qemu-alpha on 32 bit hosts (wrong assertions)
*-user: Improve documentation for lock_user function
MAINTAINERS: Add missing entry to filelist for TCI target
translate-all: Fix formatting of dump output
*-user: Fix typo in comment (ulocking -> unlocking)
docs: Fix IO port number for CPU present bitmap.
q35: Fix typo in constant DEFUALT -> DEFAULT.
configure: Undefine _FORTIFY_SOURCE prior using it
Message-id: 1379696296-32105-1-git-send-email-mjt@msgid.tls.msk.ru
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/pci-host/q35.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index 6eb7ab676f..56de92ede2 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -85,7 +85,7 @@ typedef struct Q35PCIHost { #define MCH_HOST_BRIDGE_CONFIG_DATA 0xcfc /* D0:F0 configuration space */ -#define MCH_HOST_BRIDGE_REVISION_DEFUALT 0x0 +#define MCH_HOST_BRIDGE_REVISION_DEFAULT 0x0 #define MCH_HOST_BRIDGE_PCIEXBAR 0x60 /* 64bit register */ #define MCH_HOST_BRIDGE_PCIEXBAR_SIZE 8 /* 64bit register */ |