diff options
| author | Leon Alrae <leon.alrae@imgtec.com> | 2016-03-25 13:49:37 +0000 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2016-03-30 09:14:00 +0100 |
| commit | 408294352adb6b38952ada680951f6ed2fd628d6 (patch) | |
| tree | 1acb6b8bc151672d12a7d6354d85b063a99c932a /include | |
| parent | 0d74a222c27e26fc40f4f6120c61c3f9ceaa3776 (diff) | |
| download | qemu-408294352adb6b38952ada680951f6ed2fd628d6.tar.gz | |
hw/mips/cps: enable ITU for multithreading processors
Make ITU available in the system if CPU supports multithreading
and is part of CPS.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/mips/cps.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h index 88be7653d7..4dbae9c8c9 100644 --- a/include/hw/mips/cps.h +++ b/include/hw/mips/cps.h @@ -23,6 +23,7 @@ #include "hw/sysbus.h" #include "hw/misc/mips_cmgcr.h" #include "hw/misc/mips_cpc.h" +#include "hw/misc/mips_itu.h" #define TYPE_MIPS_CPS "mips-cps" #define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS) @@ -37,6 +38,7 @@ typedef struct MIPSCPSState { MemoryRegion container; MIPSGCRState gcr; MIPSCPCState cpc; + MIPSITUState itu; } MIPSCPSState; qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number); |