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| author | Jason Wang <jasowang@redhat.com> | 2016-01-14 00:47:24 -0500 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2016-02-06 20:44:10 +0200 |
| commit | d66b969b0d9c8eefdcbff4b48535b0fe1501d139 (patch) | |
| tree | 823dc2cead5bf7ca47718fd189875d8101b042e0 /include | |
| parent | adcb4ee660cf579f003e9d4afd61b608259091c6 (diff) | |
| download | qemu-d66b969b0d9c8eefdcbff4b48535b0fe1501d139.tar.gz | |
intel_iommu: large page support
Current intel_iommu only supports 4K page which may not be sufficient
to cover guest working set. This patch tries to enable 2M and 1G mapping
for intel_iommu. This is also useful for future device IOTLB
implementation to have a better hit rate.
Major work is adding a page mask field on IOTLB entry to make it
support large page. And also use the slpte level as key to do IOTLB
lookup. MAMV was increased to 18 to support direct invalidation for 1G
mapping.
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/i386/intel_iommu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index 5dbadb785c..b024ffa720 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -83,6 +83,7 @@ struct VTDIOTLBEntry { uint64_t gfn; uint16_t domain_id; uint64_t slpte; + uint64_t mask; bool read_flags; bool write_flags; }; |