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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-03-01 14:27:54 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-03-01 14:27:54 +0000
commit7bfdb6d18c7bb5792c896a0bf6cf1ad7431630cb (patch)
tree720a54b568990e44fbb4920ae61ec538efabbf9c /opreg_template.h
parent379ca80d34d685c038800be58d2314933619d78b (diff)
downloadqemu-7bfdb6d18c7bb5792c896a0bf6cf1ad7431630cb.tar.gz
new i386 emulator core
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@13 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'opreg_template.h')
-rw-r--r--opreg_template.h103
1 files changed, 103 insertions, 0 deletions
diff --git a/opreg_template.h b/opreg_template.h
new file mode 100644
index 0000000000..6cf188ffed
--- /dev/null
+++ b/opreg_template.h
@@ -0,0 +1,103 @@
+/* templates for various register related operations */
+
+void OPPROTO glue(op_movl_A0,REGNAME)(void)
+{
+ A0 = REG;
+}
+
+void OPPROTO glue(op_addl_A0,REGNAME)(void)
+{
+ A0 += REG;
+}
+
+void OPPROTO glue(glue(op_addl_A0,REGNAME),_s1)(void)
+{
+ A0 += REG << 1;
+}
+
+void OPPROTO glue(glue(op_addl_A0,REGNAME),_s2)(void)
+{
+ A0 += REG << 2;
+}
+
+void OPPROTO glue(glue(op_addl_A0,REGNAME),_s3)(void)
+{
+ A0 += REG << 3;
+}
+
+void OPPROTO glue(op_movl_T0,REGNAME)(void)
+{
+ T0 = REG;
+}
+
+void OPPROTO glue(op_movl_T1,REGNAME)(void)
+{
+ T1 = REG;
+}
+
+void OPPROTO glue(op_movh_T0,REGNAME)(void)
+{
+ T0 = REG >> 8;
+}
+
+void OPPROTO glue(op_movh_T1,REGNAME)(void)
+{
+ T1 = REG >> 8;
+}
+
+void OPPROTO glue(glue(op_movl,REGNAME),_T0)(void)
+{
+ REG = T0;
+}
+
+void OPPROTO glue(glue(op_movl,REGNAME),_T1)(void)
+{
+ REG = T1;
+}
+
+void OPPROTO glue(glue(op_movl,REGNAME),_A0)(void)
+{
+ REG = A0;
+}
+
+/* NOTE: T0 high order bits are ignored */
+void OPPROTO glue(glue(op_movw,REGNAME),_T0)(void)
+{
+ REG = (REG & 0xffff0000) | (T0 & 0xffff);
+}
+
+/* NOTE: T0 high order bits are ignored */
+void OPPROTO glue(glue(op_movw,REGNAME),_T1)(void)
+{
+ REG = (REG & 0xffff0000) | (T1 & 0xffff);
+}
+
+/* NOTE: A0 high order bits are ignored */
+void OPPROTO glue(glue(op_movw,REGNAME),_A0)(void)
+{
+ REG = (REG & 0xffff0000) | (A0 & 0xffff);
+}
+
+/* NOTE: T0 high order bits are ignored */
+void OPPROTO glue(glue(op_movb,REGNAME),_T0)(void)
+{
+ REG = (REG & 0xffffff00) | (T0 & 0xff);
+}
+
+/* NOTE: T0 high order bits are ignored */
+void OPPROTO glue(glue(op_movh,REGNAME),_T0)(void)
+{
+ REG = (REG & 0xffff00ff) | ((T0 & 0xff) << 8);
+}
+
+/* NOTE: T1 high order bits are ignored */
+void OPPROTO glue(glue(op_movb,REGNAME),_T1)(void)
+{
+ REG = (REG & 0xffffff00) | (T1 & 0xff);
+}
+
+/* NOTE: T1 high order bits are ignored */
+void OPPROTO glue(glue(op_movh,REGNAME),_T1)(void)
+{
+ REG = (REG & 0xffff00ff) | ((T1 & 0xff) << 8);
+}