target-alpha: Use separate TCGv temporaries for the shadow registers

This avoids having to manually swap them around when swapping to and
from PALmode.  We simply encode the shadow registers into the translation.

The VMStateDescription version changes, because the meaning of "shadow"
changes in the save file when in PALmode.  It would be possible to fix
this, but I don't think it's worth the effort.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>

1 files changed, 2 insertions, 1 deletions

diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 91c56d6bcf..3f1ece30ee 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -445,8 +445,9 @@ void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);
 
 uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env);
 void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val);
+uint64_t cpu_alpha_load_gr(CPUAlphaState *env, unsigned reg);
+void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val);
 #ifndef CONFIG_USER_ONLY
-void swap_shadow_regs(CPUAlphaState *env);
 QEMU_NORETURN void alpha_cpu_unassigned_access(CPUState *cpu, hwaddr addr,
                                                bool is_write, bool is_exec,
                                                int unused, unsigned size);