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authorRichard Henderson <rth@twiddle.net>2010-04-07 15:42:26 -0700
committerAurelien Jarno <aurelien@aurel32.net>2010-04-27 05:50:41 +0200
commit6910b8f66a9ad0c2c2052b4be884e11b76049718 (patch)
tree41ac594d78564a239e81f0b3b4b7a00a49525ec0 /target-alpha/cpu.h
parent8aa3fa2038d9d0a7d69acdac505d990acc5eafc8 (diff)
downloadqemu-6910b8f66a9ad0c2c2052b4be884e11b76049718.tar.gz
target-alpha: Fix load-locked/store-conditional.
Use an exception plus start_exclusive to implement the compare-and-swap. This follows the example set by the MIPS and PPC ports. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-alpha/cpu.h')
-rw-r--r--target-alpha/cpu.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index c3979300f1..817504b02b 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -355,11 +355,13 @@ struct CPUAlphaState {
uint64_t ir[31];
float64 fir[31];
uint64_t pc;
- uint64_t lock;
uint32_t pcc[2];
uint64_t ipr[IPR_LAST];
uint64_t ps;
uint64_t unique;
+ uint64_t lock_addr;
+ uint64_t lock_st_addr;
+ uint64_t lock_value;
float_status fp_status;
/* The following fields make up the FPCR, but in FP_STATUS format. */
uint8_t fpcr_exc_status;
@@ -440,6 +442,8 @@ enum {
/* Pseudo exception for console */
EXCP_CONSOLE_DISPATCH = 0x4001,
EXCP_CONSOLE_FIXUP = 0x4002,
+ EXCP_STL_C = 0x4003,
+ EXCP_STQ_C = 0x4004,
};
/* Arithmetic exception */