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| author | Andreas Färber <afaerber@suse.de> | 2013-06-21 22:01:20 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-09 21:33:03 +0200 |
| commit | 86a35f7c4608b1961a1a459659a97033cc14d274 (patch) | |
| tree | 66898c7f2cac9cfdc4bd4743bae9b1c5cafa973e /target-alpha | |
| parent | ae06d4988d6799f0bd16f27c2bcf80fa1cd2cfd7 (diff) | |
| download | qemu-86a35f7c4608b1961a1a459659a97033cc14d274.tar.gz | |
target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU
Also use bool argument while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-alpha')
| -rw-r--r-- | target-alpha/translate.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 4db16db462..dd7f0fbf94 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -3375,10 +3375,11 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) return ret; } -static inline void gen_intermediate_code_internal(CPUAlphaState *env, +static inline void gen_intermediate_code_internal(AlphaCPU *cpu, TranslationBlock *tb, - int search_pc) + bool search_pc) { + CPUAlphaState *env = &cpu->env; DisasContext ctx, *ctxp = &ctx; target_ulong pc_start; uint32_t insn; @@ -3502,12 +3503,12 @@ static inline void gen_intermediate_code_internal(CPUAlphaState *env, void gen_intermediate_code (CPUAlphaState *env, struct TranslationBlock *tb) { - gen_intermediate_code_internal(env, tb, 0); + gen_intermediate_code_internal(alpha_env_get_cpu(env), tb, false); } void gen_intermediate_code_pc (CPUAlphaState *env, struct TranslationBlock *tb) { - gen_intermediate_code_internal(env, tb, 1); + gen_intermediate_code_internal(alpha_env_get_cpu(env), tb, true); } void restore_state_to_opc(CPUAlphaState *env, TranslationBlock *tb, int pc_pos) |