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authorPeter Maydell <peter.maydell@linaro.org>2012-06-20 11:57:06 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-06-20 12:01:02 +0000
commit4b6a83fb0c34a6fcc7bb1058284e3c3674e54421 (patch)
tree96993a63c6c6e60f7936467c1f57658a52c73466 /target-arm/cpu-qom.h
parent200bf596b96820186883953de9bda26cac8e6bd7 (diff)
downloadqemu-4b6a83fb0c34a6fcc7bb1058284e3c3674e54421.tar.gz
target-arm: initial coprocessor register framework
Initial infrastructure for data-driven registration of coprocessor register implementations. We still fall back to the old-style switch statements pending complete conversion of all existing registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu-qom.h')
-rw-r--r--target-arm/cpu-qom.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index a61c68d21b..848ac2ffdf 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -58,6 +58,9 @@ typedef struct ARMCPU {
CPUARMState env;
+ /* Coprocessor information */
+ GHashTable *cp_regs;
+
/* The instance init functions for implementation-specific subclasses
* set these fields to specify the implementation-dependent values of
* various constant registers and reset values of non-constant