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| author | Nathan Rossi <nathan.rossi@xilinx.com> | 2013-10-25 15:44:38 +0100 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2013-10-31 14:00:16 +0100 |
| commit | 8641136c54d216edb5bb8ef723c754039b4c5cf3 (patch) | |
| tree | c0497b6034670052d2e64ad2226a32e07b01a340 /target-arm/cpu.h | |
| parent | dacecf5485bf02b2dfe49e9d9c852668884a71be (diff) | |
| download | qemu-8641136c54d216edb5bb8ef723c754039b4c5cf3.tar.gz | |
target-arm: Add CP15 VBAR support
Added Vector Base Address remapping on ARM v7.
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
[PMM: removed spurious mask of value with 1<<31]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 2c56740bf6..9f110f15b6 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -176,6 +176,7 @@ typedef struct CPUARMState { uint32_t c9_pmxevtyper; /* perf monitor event type */ uint32_t c9_pmuserenr; /* perf monitor user enable */ uint32_t c9_pminten; /* perf monitor interrupt enables */ + uint32_t c12_vbar; /* vector base address register */ uint32_t c13_fcse; /* FCSE PID. */ uint32_t c13_context; /* Context ID. */ uint32_t c13_tls1; /* User RW Thread register. */ |