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authorPeter Maydell <peter.maydell@linaro.org>2011-01-14 20:39:18 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-01-14 20:39:18 +0100
commit3a492f3a606642879637d50777444d82440c9f5c (patch)
tree36c28acfabbaca93bfbaf4e3cc8f8e6950daf1ae /target-arm/cpu.h
parent9ea62f571ce8953dba1d2bad2bdeaf9c3a84b7d7 (diff)
downloadqemu-3a492f3a606642879637d50777444d82440c9f5c.tar.gz
target-arm: Add support for 'Standard FPSCR Value' as used by Neon
Add support to the ARM helper routines for a second fp_status value which should be used for operations which the ARM ARM indicates use "ARM standard floating-point arithmetic" rather than being controlled by the rounding/flush/NaN settings in the FPSCR. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 340933ef50..e501cf59f1 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -173,7 +173,20 @@ typedef struct CPUARMState {
/* scratch space when Tn are not sufficient. */
uint32_t scratch[8];
+ /* fp_status is the "normal" fp status. standard_fp_status retains
+ * values corresponding to the ARM "Standard FPSCR Value", ie
+ * default-NaN, flush-to-zero, round-to-nearest and is used by
+ * any operations (generally Neon) which the architecture defines
+ * as controlled by the standard FPSCR value rather than the FPSCR.
+ *
+ * To avoid having to transfer exception bits around, we simply
+ * say that the FPSCR cumulative exception flags are the logical
+ * OR of the flags in the two fp statuses. This relies on the
+ * only thing which needs to read the exception flags being
+ * an explicit FPSCR read.
+ */
float_status fp_status;
+ float_status standard_fp_status;
} vfp;
uint32_t exclusive_addr;
uint32_t exclusive_val;