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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-06-09 15:43:25 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-06-09 16:06:11 +0100 |
| commit | da5141fc45937fa358ca4554a335ae6a4c4453ec (patch) | |
| tree | 659797d2cdbf82c775988a00ae54ec162d7e5896 /target-arm/cpu64.c | |
| parent | 25f748e37a868b322a960c322ca11fb2dc5252b2 (diff) | |
| download | qemu-da5141fc45937fa358ca4554a335ae6a4c4453ec.tar.gz | |
target-arm: VFPv4 implies half-precision extension
VFPv4 implies the presence of the half-precision floating point
extension (which is optional in VFPv3). Add this implied rule
to arm_cpu_realizefn() and remove some no-longer-needed explicit
setting of the bit in initfns.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1401458125-27977-5-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/cpu64.c')
| -rw-r--r-- | target-arm/cpu64.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index 40cc063f07..8b2081c246 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -93,7 +93,6 @@ static void aarch64_a57_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V8); set_feature(&cpu->env, ARM_FEATURE_VFP4); - set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); set_feature(&cpu->env, ARM_FEATURE_NEON); set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); set_feature(&cpu->env, ARM_FEATURE_AARCH64); @@ -143,7 +142,6 @@ static void aarch64_any_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V8); set_feature(&cpu->env, ARM_FEATURE_VFP4); - set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); set_feature(&cpu->env, ARM_FEATURE_NEON); set_feature(&cpu->env, ARM_FEATURE_AARCH64); set_feature(&cpu->env, ARM_FEATURE_V8_AES); |