diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-01-31 20:45:13 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-01-31 20:45:13 +0000 |
| commit | 99c475abf16b10923baac09682a9d801ae421ac6 (patch) | |
| tree | 3e1d1433c7f6f6e530bf50577625df75eb03274e /target-arm/exec.h | |
| parent | dfe86665b8d61659f2c24f7365f75fe89f4705ac (diff) | |
| download | qemu-99c475abf16b10923baac09682a9d801ae421ac6.tar.gz | |
armv5te support (Paul Brook)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1258 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/exec.h')
| -rw-r--r-- | target-arm/exec.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target-arm/exec.h b/target-arm/exec.h index 14e2072e6c..373b63dbea 100644 --- a/target-arm/exec.h +++ b/target-arm/exec.h @@ -31,12 +31,14 @@ void cpu_lock(void); void cpu_unlock(void); void cpu_loop_exit(void); +/* Implemented CPSR bits. */ +#define CACHED_CPSR_BITS 0xf8000000 static inline int compute_cpsr(void) { int ZF; ZF = (env->NZF == 0); return env->cpsr | (env->NZF & 0x80000000) | (ZF << 30) | - (env->CF << 29) | ((env->VF & 0x80000000) >> 3); + (env->CF << 29) | ((env->VF & 0x80000000) >> 3) | (env->QF << 27); } static inline void env_to_regs(void) |