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| author | Greg Bellows <greg.bellows@linaro.org> | 2014-10-24 12:19:14 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-10-24 12:19:14 +0100 |
| commit | dcbff19bd07c198f4f9bdbf2db740a8e282dd5f6 (patch) | |
| tree | a304e8bdf598a72b540eb0b84ab4bca496b7f4d3 /target-arm/helper-a64.c | |
| parent | 027fc52704b815bd67a92399d255f066308ca70c (diff) | |
| download | qemu-dcbff19bd07c198f4f9bdbf2db740a8e282dd5f6.tar.gz | |
target-arm: rename arm_current_pl to arm_current_el
Renamed the arm_current_pl CPU function to more accurately represent that it
returns the ARMv8 EL rather than ARMv7 PL.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1413910544-20150-5-git-send-email-greg.bellows@linaro.org
[PMM: fixed a minor merge resolution error in a couple of hunks]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper-a64.c')
| -rw-r--r-- | target-arm/helper-a64.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index daf5adcfab..81066ca936 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -450,7 +450,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) unsigned int new_mode = aarch64_pstate_mode(new_el, true); int i; - if (arm_current_pl(env) < new_el) { + if (arm_current_el(env) < new_el) { if (env->aarch64) { addr += 0x400; } else { @@ -461,7 +461,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) } arm_log_exception(cs->exception_index); - qemu_log_mask(CPU_LOG_INT, "...from EL%d\n", arm_current_pl(env)); + qemu_log_mask(CPU_LOG_INT, "...from EL%d\n", arm_current_el(env)); if (qemu_loglevel_mask(CPU_LOG_INT) && !excp_is_internal(cs->exception_index)) { qemu_log_mask(CPU_LOG_INT, "...with ESR 0x%" PRIx32 "\n", @@ -503,7 +503,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) if (is_a64(env)) { env->banked_spsr[aarch64_banked_spsr_index(new_el)] = pstate_read(env); - aarch64_save_sp(env, arm_current_pl(env)); + aarch64_save_sp(env, arm_current_el(env)); env->elr_el[new_el] = env->pc; } else { env->banked_spsr[0] = cpsr_read(env); |