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authorPeter Maydell <peter.maydell@linaro.org>2015-04-01 17:57:29 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-04-01 17:57:29 +0100
commit7847f9ea9fce15a9ecfb62ab72c1e84ff516b0db (patch)
tree57af085d325a3b98ff097c385a4c1d5ff8e0bc56 /target-arm/helper-a64.c
parent4de9a883be653f02f8c1d5dcd1066f614d9606b6 (diff)
downloadqemu-7847f9ea9fce15a9ecfb62ab72c1e84ff516b0db.tar.gz
target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc)
The AArch64 SPSR_EL1 register is architecturally mandated to be mapped to the AArch32 SPSR_svc register. This means its state should live in QEMU's env->banked_spsr[1] field. Correct the various places in the code that incorrectly put it in banked_spsr[0]. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper-a64.c')
-rw-r--r--target-arm/helper-a64.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index 7e0d038563..861f6fa69c 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -523,7 +523,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
aarch64_save_sp(env, arm_current_el(env));
env->elr_el[new_el] = env->pc;
} else {
- env->banked_spsr[0] = cpsr_read(env);
+ env->banked_spsr[aarch64_banked_spsr_index(new_el)] = cpsr_read(env);
if (!env->thumb) {
env->cp15.esr_el[new_el] |= 1 << 25;
}