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authorPeter Maydell <peter.maydell@linaro.org>2014-02-20 10:35:51 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-02-20 10:35:51 +0000
commit99f678a679857d83b9709127b0f047551d7e3c45 (patch)
treee80ef7fbb30cb547be519ce7e03240af44c6c6ac /target-arm/helper.c
parent76e3e1bcaefe0da394f328854cb72f9449f23732 (diff)
downloadqemu-99f678a679857d83b9709127b0f047551d7e3c45.tar.gz
target-arm: Restrict check_ap() use of S and R bits to v6 and earlier
The SCTLR bits S and R (8 and 9) only exist in ARMv6 and earlier. In ARMv7 these bits RAZ, and in ARMv8 they are reassigned. Guard the use of them in check_ap() so that we don't get incorrect results for ARMv8 CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index d9e94f200d..13707a37a9 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2767,6 +2767,9 @@ static inline int check_ap(CPUARMState *env, int ap, int domain_prot,
switch (ap) {
case 0:
+ if (arm_feature(env, ARM_FEATURE_V7)) {
+ return 0;
+ }
if (access_type == 1)
return 0;
switch (env->cp15.c1_sys & (SCTLR_S | SCTLR_R)) {