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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-02-26 17:19:59 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-02-26 17:19:59 +0000 |
| commit | c10f7fc3d167799f19d2184f05012b24cc56878d (patch) | |
| tree | cc963630391501f9697d51a4b4ca53377850c34b /target-arm/helper.c | |
| parent | cf143ad35018c5fc1da6365b45acda2b34aba90a (diff) | |
| download | qemu-c10f7fc3d167799f19d2184f05012b24cc56878d.tar.gz | |
target-arm: Load correct access bits from ARMv5 level 2 page table descriptors
In ARMv5 level 2 page table descriptors, each 4K or 64K page is split into
four subpages, each of which can have different access permission settings,
which are specified by four two-bit fields in the l2 descriptor. A
long-standing cut-and-paste error meant we were using the wrong bits in
the virtual address to select the access-permission field for 4K pages.
The error has presumably not been noticed before because most guests don't
make use of the ability to set the access permissions differently for
each 1K subpage: if the guest gives the whole page the same access
permissions it doesn't matter which of the 4 AP fields we select.
(The whole issue is irrelevant for ARMv7 CPUs anyway because subpages
aren't supported there.)
Reported-by: Vivek Rai <Vivek.Rai@emulex.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1392667690-8731-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/helper.c')
| -rw-r--r-- | target-arm/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index c993581688..b44aa1b55c 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2798,7 +2798,7 @@ static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type, break; case 2: /* 4k page. */ phys_addr = (desc & 0xfffff000) | (address & 0xfff); - ap = (desc >> (4 + ((address >> 13) & 6))) & 3; + ap = (desc >> (4 + ((address >> 9) & 6))) & 3; *page_size = 0x1000; break; case 3: /* 1k page. */ |