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| author | Will Newton <will.newton@linaro.org> | 2014-01-07 17:19:14 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-01-08 19:07:23 +0000 |
| commit | c436d40614ccfa756bbf3d7448356889ede825fb (patch) | |
| tree | d9007ad6bb7ed908f0cc53a10c778fb31952d581 /target-arm/helper.c | |
| parent | 52a1f6a3abb88ab875d5a70cec1048bb05e47263 (diff) | |
| download | qemu-c436d40614ccfa756bbf3d7448356889ede825fb.tar.gz | |
target-arm: A64: Add floating-point<->integer conversion instructions
Add support for the AArch64 floating-point <-> integer conversion
instructions to disas_fpintconv. In the process we can rearrange
and simplify the detection of unallocated encodings a little.
We also correct a typo in the instruction encoding diagram for this
instruction group: bit 21 is 1, not 0.
Signed-off-by: Will Newton <will.newton@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-arm/helper.c')
0 files changed, 0 insertions, 0 deletions