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authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>2015-06-15 18:06:10 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-06-15 18:06:10 +0100
commitb7cc4e82f04a1c5b218a657f677a2fdd1e1c2889 (patch)
tree32135d89733f819b41c10b6f007afd98fd05e295 /target-arm/internals.h
parent8e5d75c950a1241f6e1243c37f28cd58f68fedc9 (diff)
downloadqemu-b7cc4e82f04a1c5b218a657f677a2fdd1e1c2889.tar.gz
arm: Refactor get_phys_addr FSR return mechanism
Currently, the return code for get_phys_addr is overloaded for both success/fail and FSR value return. This doesn't handle the case where there is an error with a 0 FSR. This case exists in PMSAv7. So rework get_phys_addr and friends to return a success/failure boolean return code and populate the FSR via a caller provided uint32_t pointer. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a209e3d8ae00cda55260c970891f520210e26bad.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/internals.h')
-rw-r--r--target-arm/internals.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-arm/internals.h b/target-arm/internals.h
index 1e5071ea72..924aff9d04 100644
--- a/target-arm/internals.h
+++ b/target-arm/internals.h
@@ -388,6 +388,7 @@ void arm_handle_psci_call(ARMCPU *cpu);
#endif
/* Do a page table walk and add page to TLB if possible */
-int arm_tlb_fill(CPUState *cpu, vaddr address, int rw, int mmu_idx);
+bool arm_tlb_fill(CPUState *cpu, vaddr address, int rw, int mmu_idx,
+ uint32_t *fsr);
#endif