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authorPeter Maydell <peter.maydell@linaro.org>2014-04-15 19:18:43 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-04-17 21:34:04 +0100
commita65f1de982302f5c33f668ad25a120eba7993d37 (patch)
tree68af19a05242c14ebb938b889a9f5be3728fdb94 /target-arm/kvm64.c
parentf502cfc207ff288ec1f3dac10024c51ffe64a65d (diff)
downloadqemu-a65f1de982302f5c33f668ad25a120eba7993d37.tar.gz
target-arm: Implement AArch64 SPSR_EL1
Implement the AArch64 SPSR_EL1. For compatibility with how KVM handles SPSRs and with the architectural mapping between AArch32 and AArch64, we put this in the banked_spsr[] array in the slot that is used for SVC in AArch32. This means we need to extend the array from uint32_t to uint64_t, which requires some reworking of the 32 bit KVM save/restore code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm/kvm64.c')
-rw-r--r--target-arm/kvm64.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c
index 39c4364593..e115879d9a 100644
--- a/target-arm/kvm64.c
+++ b/target-arm/kvm64.c
@@ -167,8 +167,16 @@ int kvm_arch_put_registers(CPUState *cs, int level)
return ret;
}
+ for (i = 0; i < KVM_NR_SPSR; i++) {
+ reg.id = AARCH64_CORE_REG(spsr[i]);
+ reg.addr = (uintptr_t) &env->banked_spsr[i - 1];
+ ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
+ if (ret) {
+ return ret;
+ }
+ }
+
/* TODO:
- * SPSR[]
* FP state
* system registers
*/
@@ -239,6 +247,15 @@ int kvm_arch_get_registers(CPUState *cs)
return ret;
}
+ for (i = 0; i < KVM_NR_SPSR; i++) {
+ reg.id = AARCH64_CORE_REG(spsr[i]);
+ reg.addr = (uintptr_t) &env->banked_spsr[i - 1];
+ ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
+ if (ret) {
+ return ret;
+ }
+ }
+
/* TODO: other registers */
return ret;
}