diff options
| author | Alexander Graf <agraf@suse.de> | 2013-12-17 19:42:34 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-17 19:42:34 +0000 |
| commit | 15bfe8b650a0fd40940cb8f4bfc8c57d6940173e (patch) | |
| tree | 68dda204aa081d19e8c0acaa281256739cdb207f /target-arm/translate-a64.c | |
| parent | 832ffa1ce073f010fd1c766361b2e35ce3f105d3 (diff) | |
| download | qemu-15bfe8b650a0fd40940cb8f4bfc8c57d6940173e.tar.gz | |
target-arm: A64: add support for ADR and ADRP
Add support for the instructions described in
"C3.4.6 PC-rel. addressing" (ADR and ADRP).
Signed-off-by: Alexander Graf <agraf@suse.de>
[claudio: adapted to new decoder structure]
Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/translate-a64.c')
| -rw-r--r-- | target-arm/translate-a64.c | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index a459ce6c44..9677d01563 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -653,10 +653,31 @@ static void disas_ldst(DisasContext *s, uint32_t insn) } } -/* PC-rel. addressing */ +/* C3.4.6 PC-rel. addressing + * 31 30 29 28 24 23 5 4 0 + * +----+-------+-----------+-------------------+------+ + * | op | immlo | 1 0 0 0 0 | immhi | Rd | + * +----+-------+-----------+-------------------+------+ + */ static void disas_pc_rel_adr(DisasContext *s, uint32_t insn) { - unsupported_encoding(s, insn); + unsigned int page, rd; + uint64_t base; + int64_t offset; + + page = extract32(insn, 31, 1); + /* SignExtend(immhi:immlo) -> offset */ + offset = ((int64_t)sextract32(insn, 5, 19) << 2) | extract32(insn, 29, 2); + rd = extract32(insn, 0, 5); + base = s->pc - 4; + + if (page) { + /* ADRP (page based) */ + base &= ~0xfff; + offset <<= 12; + } + + tcg_gen_movi_i64(cpu_reg(s, rd), base + offset); } /* Add/subtract (immediate) */ |