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authorPeter Maydell <peter.maydell@linaro.org>2014-03-10 14:56:30 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-03-10 14:56:30 +0000
commit72c1d3af6e9c2745edfeaa71918a68bcee4b79db (patch)
treed7d01966c8d75f5427fc2a9bce5994b17fe79253 /target-arm/translate.h
parent2b194951c592ad670ddf3bc5764216408ade46f8 (diff)
downloadqemu-72c1d3af6e9c2745edfeaa71918a68bcee4b79db.tar.gz
target-arm: Implement WFE as a yield operation
Implement WFE to yield our timeslice to the next CPU. This avoids slowdowns in multicore configurations caused by one core busy-waiting on a spinlock which can't possibly be unlocked until the other core has an opportunity to run. This speeds up my test case A15 dual-core boot by a factor of three (though it is still four or five times slower than a single-core boot). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1393339545-22111-1-git-send-email-peter.maydell@linaro.org Reviewed-by: Richard Henderson <rth@twiddle.net> Tested-by: Rob Herring <rob.herring@linaro.org>
Diffstat (limited to 'target-arm/translate.h')
-rw-r--r--target-arm/translate.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-arm/translate.h b/target-arm/translate.h
index 67da6996c9..2f491f9ff6 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -44,6 +44,8 @@ extern TCGv_ptr cpu_env;
* emitting unreachable code at the end of the TB in the A64 decoder
*/
#define DISAS_EXC 6
+/* WFE */
+#define DISAS_WFE 7
#ifdef TARGET_AARCH64
void a64_translate_init(void);