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| author | Greg Bellows <greg.bellows@linaro.org> | 2014-10-24 12:19:14 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-10-24 12:19:14 +0100 |
| commit | dcbff19bd07c198f4f9bdbf2db740a8e282dd5f6 (patch) | |
| tree | a304e8bdf598a72b540eb0b84ab4bca496b7f4d3 /target-arm/translate.h | |
| parent | 027fc52704b815bd67a92399d255f066308ca70c (diff) | |
| download | qemu-dcbff19bd07c198f4f9bdbf2db740a8e282dd5f6.tar.gz | |
target-arm: rename arm_current_pl to arm_current_el
Renamed the arm_current_pl CPU function to more accurately represent that it
returns the ARMv8 EL rather than ARMv7 PL.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1413910544-20150-5-git-send-email-greg.bellows@linaro.org
[PMM: fixed a minor merge resolution error in a couple of hunks]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/translate.h')
| -rw-r--r-- | target-arm/translate.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate.h b/target-arm/translate.h index 83fbf382a5..41a907157f 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -29,7 +29,7 @@ typedef struct DisasContext { */ uint32_t svc_imm; int aarch64; - int current_pl; + int current_el; GHashTable *cp_regs; uint64_t features; /* CPU features bits */ /* Because unallocated encodings generate different exception syndrome @@ -68,7 +68,7 @@ static inline int arm_dc_feature(DisasContext *dc, int feature) static inline int get_mem_index(DisasContext *s) { - return s->current_pl; + return s->current_el; } /* target-specific extra values for is_jmp */ |