summaryrefslogtreecommitdiff
path: root/target-arm
diff options
context:
space:
mode:
authorAlex Bennée <alex.bennee@linaro.org>2014-10-15 08:16:31 +0100
committerMichael Tokarev <mjt@tls.msk.ru>2014-11-02 10:04:34 +0300
commit0d61f18b57432e56340b2fabe01222fc464fe92a (patch)
tree2aa6757b52548b586b26e2d6aa6a07b67c4d1cd5 /target-arm
parent11693a6cf0c3fac2e0ad64f06978095f85f0ec8a (diff)
downloadqemu-0d61f18b57432e56340b2fabe01222fc464fe92a.tar.gz
target-arm: A64: remove redundant store
There is not much point storing the same value twice in a row. Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate-a64.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 3a3c48acf4..80d2c07e82 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -748,7 +748,6 @@ static void do_fp_st(DisasContext *s, int srcidx, TCGv_i64 tcg_addr, int size)
} else {
TCGv_i64 tcg_hiaddr = tcg_temp_new_i64();
tcg_gen_qemu_st_i64(tmp, tcg_addr, get_mem_index(s), MO_TEQ);
- tcg_gen_qemu_st64(tmp, tcg_addr, get_mem_index(s));
tcg_gen_ld_i64(tmp, cpu_env, fp_reg_hi_offset(s, srcidx));
tcg_gen_addi_i64(tcg_hiaddr, tcg_addr, 8);
tcg_gen_qemu_st_i64(tmp, tcg_hiaddr, get_mem_index(s), MO_TEQ);