diff options
| author | Lluís Vilanova <vilanova@ac.upc.edu> | 2016-02-25 17:43:15 +0100 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2016-03-01 13:27:09 +0000 |
| commit | 1bcea73e13b2b059d0cb3301aeaca43e5656ef57 (patch) | |
| tree | 9251e3695700e6f5edff2293546365159b2b5ac8 /target-arm | |
| parent | 56797b1fbce86b3844cec753100a7260b9132a6e (diff) | |
| download | qemu-1bcea73e13b2b059d0cb3301aeaca43e5656ef57.tar.gz | |
tcg: Add type for vCPU pointers
Adds the 'TCGv_env' type for pointers to 'CPUArchState' objects. The
tracing infrastructure later needs to differentiate between regular
pointers and pointers to vCPUs.
Also changes all targets to use the new 'TCGv_env' type instead of the
generic 'TCGv_ptr'. As of now, the change is merely cosmetic ('TCGv_env'
translates into 'TCGv_ptr'), but that could change in the future to
enforce the difference.
Note that a 'TCGv_env' type (for 'CPUState') is not added, since all
helpers currently receive the architecture-specific
pointer ('CPUArchState').
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Acked-by: Richard Henderson <rth@twiddle.net>
Message-id: 145641859552.30295.7821536833590725201.stgit@localhost
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/translate.c | 2 | ||||
| -rw-r--r-- | target-arm/translate.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index 413f7de686..c29c47f006 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -56,7 +56,7 @@ #define IS_USER(s) (s->user) #endif -TCGv_ptr cpu_env; +TCGv_env cpu_env; /* We reuse the same 64-bit temporaries for efficiency. */ static TCGv_i64 cpu_V0, cpu_V1, cpu_M0; static TCGv_i32 cpu_R[16]; diff --git a/target-arm/translate.h b/target-arm/translate.h index 53ef971058..82e3f6bf06 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -70,7 +70,7 @@ typedef struct DisasCompare { } DisasCompare; /* Share the TCG temporaries common between 32 and 64 bit modes. */ -extern TCGv_ptr cpu_env; +extern TCGv_env cpu_env; extern TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF; extern TCGv_i64 cpu_exclusive_addr; extern TCGv_i64 cpu_exclusive_val; |