diff options
| author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-29 00:20:44 +0000 |
|---|---|---|
| committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-29 00:20:44 +0000 |
| commit | fbb4a2e371f2fa7d3bbe479795d8c79a795f7cd3 (patch) | |
| tree | 7ac6203fe8fd1adb8b844da4073ae7919bfe83a2 /target-arm | |
| parent | ce5232c5c281552039466be5eadf93a712eb7611 (diff) | |
| download | qemu-fbb4a2e371f2fa7d3bbe479795d8c79a795f7cd3.tar.gz | |
Implement ARM magic kernel page and TLS register.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4610 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/cpu.h | 5 | ||||
| -rw-r--r-- | target-arm/translate.c | 11 |
2 files changed, 15 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index c26cad28b6..f7252f5c21 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -38,6 +38,7 @@ #define EXCP_FIQ 6 #define EXCP_BKPT 7 #define EXCP_EXCEPTION_EXIT 8 /* Return from v7M exception. */ +#define EXCP_KERNEL_TRAP 9 /* Jumped to kernel code page. */ #define ARMV7M_EXCP_RESET 1 #define ARMV7M_EXCP_NMI 2 @@ -216,6 +217,10 @@ int cpu_arm_signal_handler(int host_signum, void *pinfo, void cpu_lock(void); void cpu_unlock(void); +static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls) +{ + env->cp15.c13_tls2 = newtls; +} #define CPSR_M (0x1f) #define CPSR_T (1 << 5) diff --git a/target-arm/translate.c b/target-arm/translate.c index 29755de90b..be5b99b079 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -8583,7 +8583,16 @@ static inline int gen_intermediate_code_internal(CPUState *env, store_cpu_field(tmp, condexec_bits); } do { -#ifndef CONFIG_USER_ONLY +#ifdef CONFIG_USER_ONLY + /* Intercept jump to the magic kernel page. */ + if (dc->pc >= 0xffff0000) { + /* We always get here via a jump, so know we are not in a + conditional execution block. */ + gen_exception(EXCP_KERNEL_TRAP); + dc->is_jmp = DISAS_UPDATE; + break; + } +#else if (dc->pc >= 0xfffffff0 && IS_M(env)) { /* We always get here via a jump, so know we are not in a conditional execution block. */ |