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| author | Peter Maydell <peter.maydell@linaro.org> | 2011-03-06 20:32:09 +0000 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-03-06 23:30:18 +0100 |
| commit | 29501f1b9e6b1ee9d5d4761a452116321be5ae95 (patch) | |
| tree | f1d3b93695ad4d9fd3298fd7719841fa451ebd01 /target-arm | |
| parent | f66a99d7526782495931bb1ef22f0a6c623c0ff0 (diff) | |
| download | qemu-29501f1b9e6b1ee9d5d4761a452116321be5ae95.tar.gz | |
target-arm: Set carry flag correctly for Thumb2 ORNS
The code for Thumb2 ORNS (or negated and set flags) was trashing
a TCG input register which was needed later for use in calculating
flags, with the effect that the carry flag was always set with
the wrong sense. Fix this by using the TCG orc op instead of
separate not and or ops.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/translate.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index 5be504c800..b08b636635 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7351,8 +7351,7 @@ gen_thumb2_data_op(DisasContext *s, int op, int conds, uint32_t shifter_out, TCG logic_cc = conds; break; case 3: /* orn */ - tcg_gen_not_i32(t1, t1); - tcg_gen_or_i32(t0, t0, t1); + tcg_gen_orc_i32(t0, t0, t1); logic_cc = conds; break; case 4: /* eor */ |