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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-03-17 16:31:46 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-03-17 16:31:46 +0000 |
| commit | d6d60581f3f6778de85ee23427006151b5226667 (patch) | |
| tree | a046276f321a34489f1d7ee099ccda4b6d47beb3 /target-arm | |
| parent | ba7500852d8c3926a732892236765eee1bcaea93 (diff) | |
| download | qemu-d6d60581f3f6778de85ee23427006151b5226667.tar.gz | |
target-arm: Add ARM_CP_IO notation to PMCR reginfo
Now that the PMCR writefn makes timer accesses, its reginfo needs
the ARM_CP_IO flag, so that icount mode works correctly. (Fixes
the bug accidentally introduced in commit 7c2cb42b).
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1394908291-16546-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/helper.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index f0a1fd48e6..5080372bad 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1983,6 +1983,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) ARMCPRegInfo pmcr = { .name = "PMCR", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 = 0, .access = PL0_RW, .resetvalue = cpu->midr & 0xff000000, + .type = ARM_CP_IO, .fieldoffset = offsetof(CPUARMState, cp15.c9_pmcr), .accessfn = pmreg_access, .writefn = pmcr_write, .raw_writefn = raw_write, |