diff options
| author | edgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-06 08:04:40 +0000 |
|---|---|---|
| committer | edgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-06 08:04:40 +0000 |
| commit | ef29a70d18c2d551cf4bb74b8aa9638caac3391b (patch) | |
| tree | 5f96cc802caeeb4c3c62d107b4b3e55b4af3d9e0 /target-cris/mmu.c | |
| parent | 4586f9e9a1c2b4d7856b640f7f327589dbfe2423 (diff) | |
| download | qemu-ef29a70d18c2d551cf4bb74b8aa9638caac3391b.tar.gz | |
CRIS MMU Updates
* Add support for exec faults and for the k protection bit.
* Abort if search_pc causes recursive mmu faults.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4349 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-cris/mmu.c')
| -rw-r--r-- | target-cris/mmu.c | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/target-cris/mmu.c b/target-cris/mmu.c index ac711fb983..a17d21d120 100644 --- a/target-cris/mmu.c +++ b/target-cris/mmu.c @@ -32,12 +32,12 @@ #define D(x) -static int cris_mmu_enabled(uint32_t rw_gc_cfg) +static inline int cris_mmu_enabled(uint32_t rw_gc_cfg) { return (rw_gc_cfg & 12) != 0; } -static int cris_mmu_segmented_addr(int seg, uint32_t rw_mm_cfg) +static inline int cris_mmu_segmented_addr(int seg, uint32_t rw_mm_cfg) { return (1 << seg) & rw_mm_cfg; } @@ -187,15 +187,26 @@ static int cris_mmu_translate_page(struct cris_mmu_result_t *res, set_exception_vector(0x0a, d_mmu_access); set_exception_vector(0x0b, d_mmu_write); */ - if (!tlb_g + if (!tlb_g && tlb_pid != (env->pregs[PR_PID] & 0xff)) { D(printf ("tlb: wrong pid %x %x pc=%x\n", tlb_pid, env->pregs[PR_PID], env->pc)); match = 0; res->bf_vec = vect_base; + } else if (cfg_k && tlb_k && usermode) { + D(printf ("tlb: kernel protected %x lo=%x pc=%x\n", + vaddr, lo, env->pc)); + match = 0; + res->bf_vec = vect_base + 2; } else if (rw == 1 && cfg_w && !tlb_w) { - D(printf ("tlb: write protected %x lo=%x\n", - vaddr, lo)); + D(printf ("tlb: write protected %x lo=%x pc=%x\n", + vaddr, lo, env->pc)); + match = 0; + /* write accesses never go through the I mmu. */ + res->bf_vec = vect_base + 3; + } else if (rw == 2 && cfg_x && !tlb_x) { + D(printf ("tlb: exec protected %x lo=%x pc=%x\n", + vaddr, lo, env->pc)); match = 0; res->bf_vec = vect_base + 3; } else if (cfg_v && !tlb_v) { |