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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-22 10:13:38 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-22 10:13:38 +0000
commit12e26b75d49adbd69ce5f00659f5c51d19d45304 (patch)
treeb4a9b8cc02ba542677f623eea172377bcb099e05 /target-i386/TODO
parent1b9d9ebb8a2efb780365214313625b7d717bca83 (diff)
downloadqemu-12e26b75d49adbd69ce5f00659f5c51d19d45304.tar.gz
lahf/sahf cpuid test
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4523 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/TODO')
-rw-r--r--target-i386/TODO9
1 files changed, 2 insertions, 7 deletions
diff --git a/target-i386/TODO b/target-i386/TODO
index 1a1bf562b6..9fd1bbeb3b 100644
--- a/target-i386/TODO
+++ b/target-i386/TODO
@@ -1,16 +1,10 @@
Correctness issues:
- some eflags manipulation incorrectly reset the bit 0x2.
-- rework eflags optimization (will be a consequence of TCG port)
- SVM: rework the implementation: simplify code, move most intercept
tests as dynamic, correct segment access, verify exception safety,
cpu save/restore, SMM save/restore.
-- x86_64: fxsave/fxrestore intel/amd differences
- x86_64: lcall/ljmp intel/amd differences ?
-- x86_64: cmpxchgl intel/amd differences ?
-- x86_64: cmovl intel/amd differences ?
-- cmpxchg16b + cmpxchg8b cpuid test
-- x86: monitor invalid
- better code fetch (different exception handling + CS.limit support)
- user/kernel PUSHL/POPL in helper.c
- add missing cpuid tests
@@ -27,11 +21,12 @@ Correctness issues:
Optimizations/Features:
-- finish TCG port
- add SVM nested paging support
- add VMX support
- add AVX support
- add SSE5 support
+- fxsave/fxrstor AMD extensions
+- improve monitor/mwait support
- faster EFLAGS update: consider SZAP, C, O can be updated separately
with a bit field in CC_OP and more state variables.
- evaluate x87 stack pointer statically