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authorPaolo Bonzini <pbonzini@redhat.com>2014-05-27 12:58:36 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2014-06-05 16:10:34 +0200
commite8f6d00c30ed88910d0d985f4b2bf41654172ceb (patch)
tree642d31c71ec4d0d1f506e9ae893a2b352c76cf3f /target-i386/cpu.h
parentb728464ae823a220d3b698d2ce055b2ceec0e297 (diff)
downloadqemu-e8f6d00c30ed88910d0d985f4b2bf41654172ceb.tar.gz
target-i386: raise page fault for reserved physical address bits
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r--target-i386/cpu.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index f2d5b1949e..8ceea8b8e5 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -260,6 +260,8 @@
#define PG_DIRTY_MASK (1 << PG_DIRTY_BIT)
#define PG_PSE_MASK (1 << PG_PSE_BIT)
#define PG_GLOBAL_MASK (1 << PG_GLOBAL_BIT)
+#define PG_ADDRESS_MASK 0x000ffffffffff000LL
+#define PG_HI_RSVD_MASK (PG_ADDRESS_MASK & ~PHYS_ADDR_MASK)
#define PG_HI_USER_MASK 0x7ff0000000000000LL
#define PG_NX_MASK (1LL << PG_NX_BIT)
@@ -1137,6 +1139,14 @@ uint64_t cpu_get_tsc(CPUX86State *env);
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
+/* XXX: This value should match the one returned by CPUID
+ * and in exec.c */
+# if defined(TARGET_X86_64)
+# define PHYS_ADDR_MASK 0xffffffffffLL
+# else
+# define PHYS_ADDR_MASK 0xfffffffffLL
+# endif
+
static inline CPUX86State *cpu_init(const char *cpu_model)
{
X86CPU *cpu = cpu_x86_init(cpu_model);